参数资料
| 型号： | ACS8946T |
| 厂商： | Semtech |
| 文件页数： | 2/40页 |
| 文件大小： | 0K |
| 描述： | IC JITTER ATT MULT PLL 48-QFN |
| 标准包装： | 1 |
| 类型： | 时钟/频率发生器，多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH |
| 输入： | LVPECL |
| 输出： | CML，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:4 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 625MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 托盘 |
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ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 3/November 2006 Semtech Corp.
Page 10
www.semtech.com
ACS8946 JAM PLL
Typical final output jitter. e.g. 2.8 ps rms measured
over the integration range of 12 kHz -20 MHz offset
from carrier.
Jitter Filtering: Partnering with Semtech
Line Card Protection Parts
One possible line card solution is to use the ACS8946 on
the line card to provide line card protection and direct
jitter filtering of references received from a Semtech SETS
device (ACS8520/30) on the sync card. If a Semtech LC/P
part (ACS8525) is used on the line card, another possible
solution uses the ACS8946 after the Semtech LC/P part
to dejitter the LC/P device’s output.
In the first solution, Master/Slave phase alignment on
reference switchover is taken care of by a redundant pair
arrangement of SETS devices, which use their output
phase alignment features to ensure the ACS8946 is
supplied with input clocks that are very closely tied in
phase. Then, on a line card reference switch, the
ACS8946 acts as a simple MUX adding negligible phase
offset between the references, giving very low output
disturbance for the combined system, as well as
performing its dejittering function.
In the second, more sophisticated solution, the reference
switching capability of ACS8946 is not used, as this is
carried out by the SETS or LC/P part.
In both cases, the ACS8946 can be used as both an
output jitter cleaner, and as a rate converter (19.44 MHz
and above).
One “Real World” application for the ACS8946 is to use it
to dejitter the 19.44 MHz output from a Semtech
ACS8525 LC/P device. In this case it is recommended to
set the ACS8946 PLL bandwidth to around 2 kHz to
provide a low jitter total solution. The test results detailed
in the Electrical Specifications section show the “Real
World” performance of this combination of parts which is
a superior solution to those traditionally using simple
discrete PLLs, and has the following advantages:
Low overall bandwidth, 18 Hz for example—dictated
by the ACS8525.
High input jitter attenuation and roll-off:
First, second and third order roll-off points:
- 20 dB/decade 18 Hz to 2 kHz,
- 40 dB/decade 2 kHz to 200 kHz and
- 60 dB/decade for >200 kHz.
Typical final output jitter, e.g. 2.9 ps rms (measured
over the integration range 12 kHz - 20 MHz) dictated
by the ACS8946.
High frequency stability when all input clocks fail;
holdover frequency control to Stratum 3—dictated by
the ACS8525.
Input Jitter Tolerance
Jitter tolerance is defined as the maximum amplitude of
sinusoidal jitter that can exist on the input reference clock
above which the device fails to acquire/maintain lock.
For the stand-alone device, the jitter tolerance is shown in
Figure 4. for an undivided reference i.e. full rate PFD. For
frequencies below the PLL bandwidth, jitter tolerance is
seen to decrease at a rate of -20 dB per decade. For jitter
frequencies above the PLL bandwidth, jitter tolerance is
limited to 0.9 UI p-p.
Note...If the reference clock is divided, then the jitter tolerance
will be improved.
When the ACS8946 follows an ACS8525, the input jitter
tolerance is wholly defined by the ACS8525. The system
jitter tolerance is dramatically increased due to the
extended phase capture range of the digital PLL within the
ACS8525.
Figure 4 Jitter Tolerance ACS8946
Jitter Transfer
Jitter transfer is a ratio of input jitter present on the
reference clock to the filtered jitter present on the output
clock. Standalone, the ACS8946 Jitter Transfer
Input Jitter Tolerance With 2kHz PLL Bandwidth
0.01
0.1
1
10
100
1000
10
100
1000
10000
100000
1000000
Jitter Frequency Offset from Carrier (Hz)
In
p
u
t
J
it
te
rA
m
p
lit
ud
e
p
-p
(
U
I)
ACS8946 Jitter
Tolerance
OC_12
Tolerance Mask
OC_48
Tolerance Mask
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ACS8947T | 功能描述:IC JITTER ATT MULT PLL 48-QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ACS9010 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Optoelectronic |
| ACS9510/50EVB | 制造商:Semtech Corporation 功能描述: |
| ACS9510EVB | 功能描述:EVALUATION BOARD FOR ACS9510 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:ToPSync™ 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
| ACS9510T | 制造商:Semtech Corporation 功能描述: |
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