参数资料
| 型号： | ACS8946T |
| 厂商： | Semtech |
| 文件页数： | 34/40页 |
| 文件大小： | 0K |
| 描述： | IC JITTER ATT MULT PLL 48-QFN |
| 标准包装： | 1 |
| 类型： | 时钟/频率发生器，多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH |
| 输入： | LVPECL |
| 输出： | CML，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:4 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 625MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页当前第34页第35页第36页第37页第38页第39页第40页
ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 3/November 2006 Semtech Corp.
Page 4
www.semtech.com
ACS8946 JAM PLL
Table 2 Internally Connected (IC) Pin
Pin No.
Symbol
I/O
Type
Description
37
IC1
-
Internally Connected: Connect to ground.
Table 3 Functional Pins
Pin No.
Symbol
I/O
Type
Description
2OUT1N
O
CML or
LVPECL
One of four CML or LVPECL differential outputs, partnered with pin 3; programmable at
spot frequencies from 19.44 MHz up to 625.00 MHz. For outputs OUT1 and OUT2 only,
output frequency can be instantly configured using Rate Selection pins (pins 47 and 48
for OUT1), from a set of four pre-configured “Available Rates”. See“Configuration” on
page 13. Output is on when VDD01 is supplied with 3.3 V, or off when VDD01 is tied to
zero volts. If VDD01 is connected to 0 V remove external biasing resistors.
3OUT1P
O
CML or
LVPECL
CML or LVPECL differential output partnered with pin 2. See pin 2 description for more
detail.
5OUT2N
O
CML or
LVPECL
One of four CML or LVPECL differential outputs, partnered with pin 6; programmable at
spot frequencies from 19.44 MHz up to 625.00 MHz. For outputs OUT1 and OUT2 only,
output frequency can be instantly configured using Rate Selection pins (pins 45 and 46
for OUT2), from a set of four pre-configured “Available Rates”. See“Configuration” on
page 13. Output is on when VDD02 is supplied with 3.3 V, or off when VDD02 is tied to
zero volts. If VDD02 is connected to 0 V remove external biasing resistors.
6OUT2P
O
CML or
LVPECL
CML or LVPECL differential output partnered with pin 5. See pin 5 description for more
detail.
8OUT3N
O
CML or
LVPECL
One of four CML or LVPECL differential outputs, partnered with pin 9; programmable at
spot frequencies from 19.44 MHz up to 625.00 MHz. For outputs OUT3 and OUT4 only,
the output frequency selection is controlled at power-up or on reset from a set of four
pre-configured “Available Rates”. See“Configuration” on page 13. Output is on when
VDD03 is supplied with 3.3 V, or off when VDD03 is tied to zero volts. If VDD03 is
connected to 0 V remove external biasing resistors.
9OUT3P
O
CML or
LVPECL
CML or LVPECL differential output partnered with pin 8. See pin 8 description for more
detail.
11
OUT4N
O
CML or
LVPECL
One of four CML or LVPECL differential outputs, partnered with pin 12; programmable at
spot frequencies from 19.44 MHz up to 625.00 MHz. For outputs OUT3 and OUT4 only,
the output frequency selection is controlled at power-up or on reset from a set of four
pre-configured “Available Rates”. See“Configuration” on page 13. Output is on when
VDD04 is supplied with 3.3 V, or off when VDD04 is tied to zero volts. If VDD04 is
connected to 0 V remove external biasing resistors.
12
OUT4P
O
CML or
LVPECL
CML or LVPECL differential output partnered with pin 11. See pin 11 description for more
detail.
13
ALARM1_CO0
O
LVTTL/
LVCMOS
Activity alarm output for the CLK1P/CLK1N input reference clock. Active high; high
indicating clock failure. It is also used to configure the device at power-up, where it is
used as a configuration output pin, that may be connected to CFG_IN[0:7] input pins as
required. See “Configuration” on page 13.
14
ALARM2_CO1
O
LVTTL/
LVCMOS
Activity alarm output for the CLK2P/CLK2N input reference clock. Active high; high
indicating clock failure. It is also used to configure the device at power-up time, where it
is used as a configuration output pin, that may be connected to CFG_IN[0:7] input pins
as required. See “Configuration” on page 13.
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相关代理商/技术参数 |
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| ACS8947T | 功能描述:IC JITTER ATT MULT PLL 48-QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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| ACS9510EVB | 功能描述:EVALUATION BOARD FOR ACS9510 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:ToPSync™ 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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