参数资料
型号: AD5422BREZ
厂商: Analog Devices Inc
文件页数: 15/44页
文件大小: 0K
描述: IC DAC 16BIT 1CH 24TSSOP
产品培训模块: Power Line Monitoring
Data Converter Fundamentals
DAC Architectures
设计资源: 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065)
Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077)
标准包装: 62
设置时间: 25µs
位数: 16
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
电压电源: 模拟和数字,双 ±
功率耗散(最大): 950mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 24-TSSOP 裸露焊盘
包装: 管件
输出数目和类型: 1 电流,单极;1 电流,双极;1 电压,单极;1 电压,双极
采样率(每秒): 40k
产品目录页面: 782 (CN2011-ZH PDF)
AD5412/AD5422
Data Sheet
Rev. I | Page 22 of 44
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
–40
–20
0
20
40
60
80
T
O
T
AL
UNAD
J
U
S
T
E
D
E
RR
O
R
(
%
F
S
R
)
TEMPERATURE (°C)
AVDD = 24V
AVSS = –24V/0V
4mA TO 20mA INTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 24mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
06
996
-01
3
Figure 50. Total Unadjusted Error vs. Temperature
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
–40
–20
0
20406080
O
F
S
E
T
E
RRO
R
(
%
F
S
R)
TEMPERATURE (°C)
4mA TO 20mA INTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 24mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
AVDD = 24V
AVSS = –24V/0V
06
99
6-
0
17
Figure 51. Offset Error vs. Temperature
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
–40
–20
0
20
40
60
80
G
AI
N
E
RRO
R
(
%
F
S
R)
TEMPERATURE (°C)
AVDD = 24V
AVSS = –24V/0V
4mA TO 20mA INTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 24mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
06
99
6-
0
18
Figure 52. Gain Error vs. Temperature
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
10
15
20
25
30
35
40
INL
E
RRO
R
(
%
F
S
R)
AVDD (V)
TA = 25°C
0mA TO 24mA RANGE
AVSS = 0V
0
69
96
-01
1
Figure 53. Integral Nonlinearity Error vs. AVDD, External RSET
–0.015
–0.020
–0.010
–0.005
0.005
0.015
0
0.010
0.020
10
15
20
25
30
35
40
INL
E
RRO
R
(
%
F
S
R)
AVDD (V)
TA = 25°C
0mA TO 24mA RANGE
AVSS = 0V
06
99
6-
0
14
Figure 54. Integral Nonlinearity Error vs. AVDD, Internal RSET
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
10
15
20
25
30
35
40
DN
L
E
RRO
R
(L
S
B
)
AVDD (V)
TA = 25°C
0mA TO 24mA RANGE
AVSS = 0V
0
69
96
-01
2
Figure 55. Differential Nonlinearity Error vs. AVDD, External RSET
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