参数资料
| 型号： | AD5422BREZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/44页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT 1CH 24TSSOP |
| 产品培训模块： | Power Line Monitoring Data Converter Fundamentals DAC Architectures |
| 设计资源： | 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065) Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077) |
| 标准包装： | 62 |
| 设置时间： | 25µs |
| 位数： | 16 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 950mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
| 包装： | 管件 |
| 输出数目和类型： | 1 电流，单极；1 电流，双极；1 电压，单极；1 电压，双极 |
| 采样率（每秒）： | 40k |
| 产品目录页面： | 782 (CN2011-ZH PDF) |
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Data Sheet
AD5412/AD5422
Rev. I | Page 25 of 44
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy, or INL, is a measure of the
maximum deviation, in LSBs, from a straight line passing
through the endpoints of the DAC transfer function. A typical
INL vs. code plot can be seen in Figure 17.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of ±1 LSB maximum ensures monoton-
icity. This DAC is guaranteed monotonic by design. A typical
DNL vs. code plot can be seen in Figure 19.
Monotonicity
A DAC is monotonic if the output either increases or remains
are monotonic over their full operating temperature range.
Bipolar Zero Error
Bipolar zero error is the deviation of the analog output from the
ideal half-scale output of 0 V when the DAC register is loaded
with 0x8000 (straight binary coding) or 0x0000 (twos comple-
ment coding). A plot of bipolar zero error vs. temperature can
be seen in Figure 28.
Bipolar Zero Temperature Coefficient (TC)
Bipolar zero TC is a measure of the change in the bipolar zero
error with a change in temperature. It is expressed in ppm FSR/°C.
Full-Scale Error
Full-scale error is a measure of the output error when full-scale
code is loaded to the DAC register. Ideally, the output should be
full-scale 1 LSB. Full-scale error is expressed in percent of
full-scale range (% FSR).
Negative Full-Scale Error/Zero-Scale Error
Negative full-scale error is the error in the DAC output voltage
when 0x0000 (straight binary coding) or 0x8000 (twos comple-
ment coding) is loaded to the DAC register. Ideally, the output
voltage should be negative full-scale 1 LSB. A plot of zero-
scale error vs. temperature can be seen in Figure 30.
Zero-Scale Temperature Coefficient (TC)
Zero-scale TC is a measure of the change in zero-scale error
with a change in temperature. Zero-scale error TC is expressed
in ppm FSR/°C.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for the
output to settle to a specified level for a full-scale input change.
Slew Rate
The slew rate of a device is a limitation in the rate of change
of the output voltage. The output slewing speed of a voltage-
output DAC is usually limited by the slew rate of the amplifier
used at its output. Slew rate is measured from 10% to 90% of the
output signal and is expressed in V/s.
Gain Error
Gain error is a measure of the span error of the DAC. It is the
deviation in slope of the DAC transfer characteristic from the
ideal expressed in % FSR. A plot of gain error vs. temperature
can be seen in Figure 29.
Gain Error Temperature Coefficient (TC)
Gain error TC is a measure of the change in gain error with
changes in temperature. Gain error TC is expressed in ppm
FSR/°C.
Total Unadjusted Error (TUE)
TUE is a measure of the output error taking all the various
errors into account, namely INL error, offset error, gain error,
and output drift over supplies, temperature, and time. TUE is
expressed in % FSR.
Current Loop Voltage Compliance
The maximum voltage at the IOUT pin for which the output
current is equal to the programmed value.
Power-On Glitch Energy
Power-on glitch energy is the impulse injected into the analog
as the area of the glitch in nV-sec. See Figure 43 and Figure 60.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state, but the output voltage remains constant. It is normally
specified as the area of the glitch in nV-sec and is measured
when the digital input code is changed by 1 LSB at the major
carry transition (0x7FFF to 0x8000). See Figure 40 and
Glitch Impulse Peak Amplitude
Glitch impulse peak amplitude is the peak amplitude of the
impulse injected into the analog output when the input code in
the DAC register changes state. It is specified as the amplitude
of the glitch in millivolt and is measured when the digital input
code is changed by 1 LSB at the major carry transition (0x7FFF
to 0x8000). See Figure 40 and Figure 63.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC but is measured when the DAC output is not updated.
It is specified in nV-sec and measured with a full-scale code
change on the data bus.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD5422BREZ-REEL | 功能描述:IC DAC 16BIT 1CH SRL INP 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
| AD5424 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5424_1 | 制造商:AD 制造商全称:Analog Devices 功能描述:8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface |
| AD5424BRU | 制造商:Analog Devices 功能描述:DAC SGL R-2R 8BIT 16TSSOP - Bulk |
| AD5424YCP | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 8-bit 20-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8-BIT IOUT DAC PARELLED INT/FACE I.C. - Bulk |
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