参数资料
型号: AD5422BREZ
厂商: Analog Devices Inc
文件页数: 23/44页
文件大小: 0K
描述: IC DAC 16BIT 1CH 24TSSOP
产品培训模块: Power Line Monitoring
Data Converter Fundamentals
DAC Architectures
设计资源: 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065)
Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077)
标准包装: 62
设置时间: 25µs
位数: 16
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
电压电源: 模拟和数字,双 ±
功率耗散(最大): 950mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 24-TSSOP 裸露焊盘
包装: 管件
输出数目和类型: 1 电流,单极;1 电流,双极;1 电压,单极;1 电压,双极
采样率(每秒): 40k
产品目录页面: 782 (CN2011-ZH PDF)
Data Sheet
AD5412/AD5422
Rev. I | Page 3 of 44
REVISION HISTORY
10/13—Rev. H to Rev. I
Added Figure 34 and Figure 35; Renumbered Sequentially......18
Changes to Figure 78 ......................................................................37
Changes to Industrial Analog Output Module Section .............39
Changes to Industrial HART Capable Analog Output
Application Section.........................................................................39
6/13—Rev. G to Rev. H
Change to REFOUT Pin, Table 6 ..................................................12
Changes to Voltage and Current Output Ranges on the Same
Terminal Section and Figure 75 ....................................................36
3/13—Rev. F to Rev. G
Changed TSSOP_EP θJA from 42°C/W to 35°C/W, Changed
LFCSP θJA from 28°C/W to 33°C/W, and Added Endnote 2.....11
Added Figure 67 ..............................................................................30
Changes to REXT Description; Table 15......................................31
Changes to Table 21 ........................................................................33
Changes to Thermal and Supply Considerations Section .........38
Changes to Table 25 ........................................................................39
7/12—Rev. E to Rev. F
Updated Outline Dimensions........................................................40
Changes to Ordering Guide...........................................................40
5/12—Rev. D to Rev. E
Reorganized Layout ...........................................................Universal
Changes to Product Title..................................................................1
Changes to Features Section, Applications Section, and General
Description Section; Added Companion Products Section.............1
Changes to Figure 1...........................................................................3
Change to Offset Error Temperature Coefficient (TC)
Parameter, Table 1 .............................................................................4
Changes to Table 6 ..........................................................................12
Changes to Power-On State Section .............................................29
Added HART Communication Section and Figure 68,
Renumbered Sequentially ..............................................................33
Added Voltage and Current Output Ranges on the Same
Terminal Section and Figure 74 ....................................................36
Added Industrial HART Capable Analog Output Application
Section ..............................................................................................38
Added Figure 79 ..............................................................................39
11/11—Rev. C to Rev. D
Changes to Table 15 ........................................................................29
3/10—Rev. B to Rev. C
Changes to AVSS to GND Parameter in Table 5.........................10
2/10—Rev. A to Rev. B
Changes to Thermal and Supply Considerations Section and
Table 25.............................................................................................36
8/09—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................4
Changes to Table 3 ............................................................................7
Changes to Introduction to Table 4 ................................................8
Changes to Introduction to Table 5 and to Table 5 ....................10
Changes to Pin Configurations and Function Descriptions
Section, Added Figure 6, Renumbered Subsequent Figures .....11
Changes to Theory of Operation Section ....................................26
Changes to Architecture Section...................................................26
Changes to AD5412/AD5422 Features Section ..........................31
Added IOUT Filtering Capacitors (LFCSP Package)Section,
Including Figure 69 to Figure 72 and Table 24............................33
Changes to Thermal and Supply Considerations Section .........36
Updated Outline Dimensions........................................................38
Changes to Ordering Guide...........................................................39
5/09—Revision 0: Initial Version
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