参数资料
型号: AD5744RCSUZ-REEL7
厂商: Analog Devices Inc
文件页数: 8/32页
文件大小: 0K
描述: IC DAC QUAD 14BIT 1LSB 32TQFP
产品培训模块: Data Converter Fundamentals
DAC Architectures
产品变化通告: AD5764(R), AD5744R Product Change 04/Sept/2009
标准包装: 500
设置时间: 10µs
位数: 14
数据接口: 串行
转换器数目: 4
电压电源: 模拟和数字,双 ±
功率耗散(最大): 387mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP
供应商设备封装: 32-TQFP(7x7)
包装: 带卷 (TR)
输出数目和类型: 4 电压,双极
采样率(每秒): *
AD5744R
Data Sheet
Rev. E | Page 16 of 32
7000
3000
4000
5000
6000
2000
–1000
0
1000
–10
10
5
0
–5
O
UT
P
UT
V
O
L
T
AG
E
DE
L
T
A
(
V
)
SOURCE/SINK CURRENT (mA)
TA = 25°C
VREFIN = 5V
VDD/VSS = ±15V
VDD/VSS = ±12V
06
5-
04
2
Figure 25. Source and Sink Capability of Output Amplifier with Positive Full
Scale Loaded
10,000
7000
8000
9000
3000
4000
5000
6000
2000
–1000
0
1000
–12
8
3
–2
–7
O
UT
P
UT
V
O
L
T
AG
E
DE
L
T
A
(
V
)
SOURCE/SINK CURRENT (mA)
TA = 25°C
VREFIN = 5V
06
5-
04
3
VDD/VSS = ±15V
VDD/VSS = ±12V
Figure 26. Source and Sink Capability of Output Amplifier with Negative Full
Scale Loaded
CH1 3.00V
M1.00s
CH1
–120mV
1
VDD/VSS = ±15V
TA = 25°C
VREFIN = 5V
1s/DIV
06
5-
0
44
Figure 27. Full-Scale Settling Time
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–2.0–1.5–1.0–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
OU
T
(m
V)
TIME (s)
VDD/VSS = ±12V,
VREFIN = 5V,
TA = 25°C,
0x8000 TO 0x7FFF,
500ns/DIV
06
5-
04
7
Figure 28. Major Code Transition Glitch Energy, VDD/VSS = ±12 V
CH4 50.0V
M1.00s
CH4
26V
4
VDD/VSS = ±15V
MIDSCALE LOADED
VREFIN = 0V
50V/DIV
06
5-
0
48
Figure 29. Peak-to-Peak Noise (100 kHz Bandwidth)
CH1 10.0V BW
CH3 10.0mV BW
T 29.60%
CH2 10.0V
M100s A CH1
7.80mV
1
2
3
VDD/VSS = ±12V,
VREFIN = 5V, TA = 25°C,
RAMP TIME = 100s,
LOAD = 200pF||10k
T
06
5-
05
5
Figure 30. VOUTx vs. VDD/VSS on Power-Up
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