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参数资料
| 型号： | AD73460 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Six-Input Channel Analog Front End |
| 中文描述： | 六输入通道模拟前端 |
| 文件页数： | 13/32页 |
| 文件大小： | 290K |
| 代理商： | AD73460 |
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AD73460
–13–
REV. 0
ADC Coding
The ADC coding scheme is in two
’
s complement format (see
Figure 5). The output words are formed by the decimation
filter, which grows the word length from the single-bit output of
the sigma-delta modulator to a 15-bit word, which is the final
output of the ADC block. In 16-bit Data Mode this value is left
shifted with the LSB being set to 0. For input values equal to or
greater than positive full scale however, the output word is set at
0x7FFF, which has the LSB set to 1. In mixed Control/Data
Mode, the resolution is fixed at 15 bits, with the MSB of the
16-bit transfer being used as a flag bit to indicate either control
or data in the frame.
V
REF
+ (V
REF
0.32875)
V
REF
V
REF
– (V
REF
0.32875)
10...00
00...00
01...11
ADC CODE DIFFERENTIAL
ANALOG
INPUT
V
INN
V
INP
V
REF
+ (V
REF
0.6575)
V
REF
– (V
REF
0.6575)
10...00
00...00
01...11
ADC CODE SINGLE-ENDED
ANALOG
INPUT
V
INP
V
INN
Figure 5. ADC Transfer Function
Voltage Reference
The AD73460 contains an internal bandgap reference that
provides a low noise, temperature-compensated reference to the
ADCs. The reference has a nominal value of 1.25 V and is avail-
able on the REFCAP pin. A buffered version of the reference is
available on the REFOUT pin and can be used to bias external
analog circuitry if required. The reference output (REFOUT) can
be enabled by setting the RU bit (CRC:6) in Control Register
C. It is possible to overdrive the internal reference by connecting
an external reference to the REFCAP pin. This may be required
when a different value of reference or better temperature coeffi-
cient is required. The current sink and source capabilities of the
REFCAP pin must be taken into consideration when overdriv-
ing the reference. When a lower value of external reference is
required it must have sufficient current sink capability to over-
ride the current source capabilities of the REFCAP pin. When a
higher value of external reference is required it can usually be
connected directly to the REFCAP pin as the pin can typically
only sink 0.25 mA before its value changes. Figure 6 shows a
plot of REFCAP Voltage versus Current. Note that the negative
values indicate that the external reference is sinking current to
provide the required reference voltage.
AFE Serial Port (SPORT2)
The AFE section communicates with DSP via the bidirectional
synchronous serial port (SPORT2) which interfaces to either
SPORT0 or SPORT1 of the DSP section. SPORT2 is used to
transmit and receive digital data and control information. An
REFCAP
–
V
–
4.5
1.00
C
–
–
4.0
–
3.5
–
3.0
–
2.5
–
2.0
–
1.5
–
1.0
–
0.5
0.0
0.5
1.10
1.20
1.30
1.40
1.50
Figure 6. REFCAP Voltage vs. Current
additional external AFE can be cascaded to the internal AFE
(up to a limit of seven) to provide additional input channels
if required.
In both transmit and receive modes, data is transferred at the
serial clock (SCLK2) rate with the MSB being transferred first.
Communication between the AFE section and DSP section
must always be initiated by the AFE section (AFE is in master
mode, DSP is in slave mode). This ensures that there is no
collision between input data and output samples.
SPORT2 Overview
SPORT2 is a flexible, full-duplex, synchronous serial port
whose protocol has been designed to allow an additional AFE to
be connected in cascade to the DSP section. It has a very
flexible architecture that can be configured by programming two
of the internal control registers in each AFE block. SPORT2 has
three distinct modes of operation: Control Mode, Data Mode,
and Mixed Control/Data Mode.
NOTE: As each AFE has its own SPORT section, the register
settings in each must be programmed. The registers that control
SPORT and sample rate operation (CRA and CRB) must be
programmed with the same values to ensure correct operation.
In Control Mode (CRA:0 = 0), the device
’
s internal configura-
tion can be programmed by writing to the eight internal control
registers. In this mode, control information can be written to or
read from the AFE. In Data Mode (CRA:0 = 1), any information
that is sent to the AFE is ignored, while the encoder section
(ADC) data is read from the device. In this mode, only ADC
data is read from the device. Mixed mode (CRA:0 = 1 and
CRA:1 = 1) allows the user to send control information and
receive either control information or ADC data. This is achieved
by using the MSB of the 16-bit frame as a flag bit. Mixed mode
reduces the resolution to 15 bits with the MSB being used to
indicate whether the information in the 16-bit frame is control
information or ADC data.
SPORT2 features a single 16-bit serial register that is used for
both input and output data transfers. As the input and output
data must share the same register, some precautions must be
observed. The primary precaution is that no information must
be written to SPORT2 without reference to an output sample
event, which is when the serial register will be overwritten with
the latest ADC sample word. Once SPORT2 starts to output
the latest ADC word, it is safe for the DSP to write new control
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|---|---|
| AD73460BB-40 | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 3.3V 119-Pin BGA 制造商:Rochester Electronics LLC 功能描述:6-CHADC WITH DSP I.C. - Bulk |
| AD73460BB-80 | 制造商:Analog Devices 功能描述:AFE General Purpose 6ADC 16-Bit 3.3V 119-Pin BGA 制造商:Rochester Electronics LLC 功能描述:6-CHADC WITH DSP I.C. - Bulk |
| AD7346ASTZ | 制造商:Analog Devices 功能描述: |
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