参数资料
型号: AD73460
厂商: Analog Devices, Inc.
英文描述: Six-Input Channel Analog Front End
中文描述: 六输入通道模拟前端
文件页数: 6/32页
文件大小: 290K
代理商: AD73460
REV. 0
AD73460
TIMING CHARACTERISTICS
AFE SECTION
1
–6–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD73460 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
*
(T
A
= 25
°
C unless otherwise noted)
AVDD, DVDD to GND . . . . . . . . . . . . . . .
0.3 V to +4.6 V
AGND to DGND . . . . . . . . . . . . . . . . . . . .
0.3 V to +0.3 V
Digital I/O Voltage to DGND . . . . .
0.3 V to DVDD + 0.3 V
Analog I/O Voltage to AGND . . . . .
0.3 V to AVDD + 0.3 V
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . .
20
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . .
20
°
C to +125
°
C
Maximum Junction Temperature . . . . . . . . . . . . . . . . 150
°
C
PBGA,
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . 25
°
C/W
Reflow Soldering
Maximum Temperature . . . . . . . . . . . . . . . . . . . . . . 225
°
C
Time at Maximum Temperature . . . . . . . . . . . . . . . 15 sec
*
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
20
°
C to +85
°
C
20
°
C to +85
°
C
Package
Description
Package
Options
Model
AD73460BB-80
AD73460BB-40
119-Ball Plastic Grid Array
119-Ball Plastic Grid Array
B-119
B-119
Limit at
T
A
=
20 C to +85 C
Parameter
Unit
Description
Clock Signals
t
1
t
2
t
3
Serial Port
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
See Figure 1
AMCLK Period
AMCLK Width High
AMCLK Width Low
See Figures 3 and 4
SCLK Period (SCLK = AMCLK)
SCLK Width High
SCLK Width Low
SDI/SDIFS Setup Before SCLK Low
SDI/SDIFS Hold After SCLK Low
SDOFS Delay from SCLK High
SDOFS Hold After SCLK High
SDO Hold After SCLK High
SDO Delay from SCLK High
SCLK Delay from AMCLK
61
24.4
24.4
ns min
ns min
ns min
t
1
0.4
×
t
1
0.4
×
t
1
20
0
10
10
10
10
30
ns min
ns min
ns min
ns min
ns min
ns max
ns max
ns max
ns max
ns max
NOTES
1
For details of the DSP section timing, please refer to the ADSP-2185L data sheet and the
ADSP-2100 Family User’s Manual,
Third Edition.
Specifications subject to change without notice.
(AVDD = 3 V to 3.6 V; DVDD = 3 V to 3.6 V; AGND = DGND = 0 V;
T
A
= T
MlN
to T
MAX
, unless otherwise noted.)
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