参数资料
型号: AD7851KRZ
厂商: Analog Devices Inc
文件页数: 5/36页
文件大小: 0K
描述: IC ADC 14BIT SRL 333KSPS 24-SOIC
标准包装: 31
位数: 14
采样率(每秒): 333k
数据接口: 8051,QSPI?,串行,SPI? µP
转换器数目: 2
功率耗散(最大): 89.25mW
电压电源: 模拟和数字
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
输入数目和类型: 1 个伪差分,单极;1 个伪差分,双极
–13–
REV. B
AD7851
CALIBRATION REGISTERS
The AD7851 has 10 calibration registers in all, 8 for the DAC, 1 for the offset, and 1 for gain. Data can be written to or read from all
10 calibration registers. In self- and system calibration, the part automatically modifies the calibration registers; only if the user needs
to modify the calibration registers should an attempt be made to read from and write to the calibration registers.
Addressing the Calibration Registers
The calibration selection bits in the control register, CALSLT1 and CALSLT0, determine which of the calibration registers are
addressed (see Table IV). The addressing applies to both the read and write operations for the calibration registers. The user
should not attempt to read from and write to the calibration registers at the same time.
Table IV. Calibration Register Addressing
CALSLT1
CALSLT0
This Combination Addresses the
0
Gain (1), Offset (1) and DAC Registers (8). Ten registers in total.
0
1
Gain (1) and Offset (1) Registers. Two registers in total.
1
0
Offset Register. One register in total.
1
Gain Register. One register in total.
Writing to/Reading from the Calibration Registers
For writing to the calibration registers, a write to the control reg-
ister is required to set the CALSLT0 and CALSLT1 bits. For
reading from the calibration registers, a write to the control regis-
ter is required to set the CALSLT0 and CALSLT1 bits, but also
to set the RDSLT1 and RDSLT0 bits to 10 (this addresses the
calibration registers for reading). The calibration register pointer
is reset on writing to the control register setting the CALSLT1
and CALSLT0 bits, or upon completion of all the calibration
register write/read operations. When reset, it points to the first
calibration register in the selected write/read sequence. The cali-
bration register pointer will point to the gain calibration register
upon reset in all but one case, this case being where the offset
calibration register is selected on its own (CALSLT1 = 1,
CALSLT0 = 0). Where more than one calibration register is being
accessed, the calibration register pointer will be automatically
incremented after each calibration register write/read operation.
The order in which the 10 calibration registers are arranged is
shown in Figure 7. The user may abort at any time before all
the calibration register write/read operations are completed,
and the next control register write operation will reset the cali-
bration register pointer. The flowchart in Figure 8 shows the
sequence for writing to the calibration registers and Figure 9
shows the sequence for reading.
CAL REGISTER
ADDRESS POINTER
CALIBRATION REGISTERS
GAIN REGISTER
OFFSET REGISTER
DAC 1st MSB REGISTER
DAC 8th MSB REGISTER
(1)
(2)
(3)
(10)
CALIBRATION REGISTER ADDRESS POINTER POSITION IS
DETERMINED BY THE NUMBER OF CALIBRATION REGISTERS
ADDRESSED AND THE NUMBER OF READ/WRITE OPERATIONS.
Figure 7. Calibration Register Arrangement
When reading from the calibration registers there will always be
two leading zeros for each of the registers. When operating in
Serial Interface Mode 1, the read operations to the calibration
registers cannot be aborted. The full number of read operations
must be completed (see the Serial Interface Summary section
for more detail).
START
WRITE TO CAL REGISTER
(ADDR1 = 1, ADDR0 = 0)
FINISHED
LAST
REGISTER
WRITE
OPERATION
OR
ABORT
?
YES
NO
CAL REGISTER POINTER IS
AUTOMATICALLY RESET
WRITE TO CONTROL REGISTER SETTING STCAL = 0
AND CALSLT1, CALSLT0 = 00, 01, 10, 11
CAL REGISTER POINTER IS
AUTOMATICALLY INCREMENTED
Figure 8. Flowchart for Writing to the Calibration Registers
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