参数资料
型号: AD9146BCPZ
厂商: Analog Devices Inc
文件页数: 37/56页
文件大小: 0K
描述: IC DAC 16BIT SRL DUAL 48LFCSP
标准包装: 1
系列: TxDAC+®
设置时间: 20ns
位数: 16
数据接口: 串行
转换器数目: 2
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-WQ(7x7)
包装: 托盘
输出数目和类型: 2 电流,单极
采样率(每秒): 1.23G
AD9146
Data Sheet
Rev. A | Page 42 of 56
REDUCING LO LEAKAGE AND UNWANTED
SIDEBANDS
Analog quadrature modulators can introduce unwanted
signals at the LO frequency due to dc offset voltages in the
I and Q baseband inputs, as well as feedthrough paths from
the LO input to the output. The LO feedthrough can be nulled
by applying the correct dc offset voltages at the DAC output.
This can be done using the auxiliary DACs (Register 0x42,
Register 0x43, Register 0x46, and Register 0x47) or by using
the digital dc offset adjustments (Register 0x3C through
Register 0x3F).
The advantage of using the auxiliary DACs is that none of
the main DAC dynamic range is used to perform the dc offset
adjustment. The disadvantage is that the common-mode level
of the output signal changes as a function of the auxiliary DAC
current. The opposite is true when the digital offset adjustment
is used.
Good sideband suppression requires both gain and phase
matching of the I and Q signals. The I/Q phase adjust registers
(Register 0x38 through Register 0x3B) and the DAC FS adjust
registers (Register 0x40 and Register 0x44) can be used to calibrate
the I and Q transmit paths to optimize sideband suppression.
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