参数资料
| 型号： | AD9146BCPZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 29/56页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT SRL DUAL 48LFCSP |
| 标准包装： | 2,500 |
| 系列： | TxDAC+® |
| 设置时间： | 20ns |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 48-LFCSP-WQ（7x7） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 1.23G |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
Data Sheet
AD9146
Rev. A | Page 35 of 56
COARSE MODULATION MIXING SEQUENCES
The coarse digital quadrature modulation occurs within the
interpolation filters. The modulation shifts the frequency
spectrum of the incoming data by the frequency offset selected.
The frequency offsets available are multiples of the input data
rate. The modulation is equivalent to multiplying the quadra-
ture input signal by a complex carrier signal, C(t), of the form
C(t) = cos(ωct) + j sin(ωct)
In practice, this modulation results in the mixing functions
shown in Table 20.
Table 20. Modulation Mixing Sequences
Modulation
Mixing Sequence
fS/2
I = I, I, I, I, …
Q = Q, Q, Q, Q, …
fS/4
I = I, Q, I, Q, …
Q = Q, I, Q, I, …
3fS/4
I = I, Q, I, Q, …
Q = Q, I, Q, I, …
fS/8
I = I, r(I + Q), Q, r(I + Q), I, r(I + Q), Q, r(I Q), …
Q = Q, r(Q I), I, r(Q + I), Q, r(Q + I), I, r(Q + I), …
Note that
2
=
r
As shown in Table 20, the mixing functions of most of the modes
cross-couple samples between the I and Q channels. The I and
Q channels operate independently only in fS/2 mode. This
means that real modulation using both the I and Q DAC outputs
can only be done in fS/2 mode. All other modulation modes
require complex input data and produce complex output signals.
QUADRATURE PHASE CORRECTION
The purpose of the quadrature phase correction block is to
enable compensation of the phase imbalance of the analog
quadrature modulator following the DAC. If the quadrature
modulator has a phase imbalance, the unwanted sideband appears
with significant energy. Tuning the quadrature phase adjust value
can optimize image rejection in single sideband radios.
Ordinarily, the I and Q channels have an angle of precisely 90°
between them. The quadrature phase adjustment is used to change
the angle between the I and Q channels. When I Phase Adj[9:0]
(Register 0x38 and Register 0x39) is set to 1000000000, the I DAC
output moves approximately 1.75° away from the Q DAC output,
creating an angle of 91.75° between the channels. When I Phase
Adj[9:0] is set to 0111111111, the I DAC output moves approxi-
mately 1.75° toward the Q DAC output, creating an angle of
88.25° between the channels.
Q Phase Adj[9:0] (Register 0x3A and Register 0x3B) works in
a similar fashion. When Q Phase Adj[9:0] is set to 1000000000,
the Q DAC output moves approximately 1.75° away from the
I DAC output, creating an angle of 91.75° between the channels.
When Q Phase Adj[9:0] is set to 0111111111, the Q DAC output
moves approximately 1.75° toward the I DAC output, creating
an angle of 88.25° between the channels.
Based on these two endpoints, the combined resolution of the
phase compensation register is approximately 3.5°/1024 or
0.00342° per code.
DC OFFSET CORRECTION
The dc value of the I datapath and the Q datapath can be
independently controlled by adjusting the I DAC Offset[15:0]
and Q DAC Offset[15:0] values in Register 0x3C through
Register 0x3F. These values are added directly to the datapath
values. Care should be taken not to overrange the transmitted
values.
Figure 45 shows how the DAC offset current varies as a function
of the I DAC Offset[15:0] and Q DAC Offset[15:0] values. With
the digital inputs fixed at midscale (0x0000, twos complement data
as the DAC offset value is swept from 0 to 65,535. Because IOUTxP
and IOUTxN are complementary current outputs, the sum of IOUTxP
and IOUTxN is always 20 mA.
0x0000
0x4000
0x8000
0xC000
0xFFFF
5
10
15
20
5
10
15
20
0
DAC OFFSET VALUE
I O
UT
x
N
(mA)
I O
UT
x
P
(
mA)
09691-
050
Figure 45. DAC Output Currents vs. DAC Offset Value
相关PDF资料 |
PDF描述 |
|---|---|
| AD9267BCPZ | IC MOD SIGMA-DELTA DUAL 64LFCSP |
| AD9272BSVZRL-80 | IC ADC ASD OCTAL 80MSPS 100-TQFP |
| AD9273BBCZ-50 | IC ADCASD OCTAL 25MSPS 144CSPBGA |
| AD9276BSVZ | IC ADC 12BIT LNA/VGA/AAF 100TQFP |
| AD9277BSVZ | IC ADC 14BIT LNA/VGA/AAF 100TQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9146-EBZ | 制造商:Analog Devices 功能描述:16 BIT DUAL SIGNAL PROC DAC EB - Boxed Product (Development Kits) |
| AD9146-M5375-EBZ | 功能描述:BOARD EVAL FOR AD9146 DAC RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:TxDAC+® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9148 | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter |
| AD9148ARUZ | 制造商:Analog Devices 功能描述:- Rail/Tube |
| AD9148BBCZ | 功能描述:IC DAC 16BIT QD 1GSPS 196CSPBGA RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TxDAC+® 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
发布紧急采购，3分钟左右您将得到回复。