参数资料
型号: AD9146BCPZRL
厂商: Analog Devices Inc
文件页数: 30/56页
文件大小: 0K
描述: IC DAC 16BIT SRL DUAL 48LFCSP
标准包装: 2,500
系列: TxDAC+®
设置时间: 20ns
位数: 16
数据接口: 串行
转换器数目: 2
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-WQ(7x7)
包装: 带卷 (TR)
输出数目和类型: 2 电流,单极
采样率(每秒): 1.23G
AD9146
Data Sheet
Rev. A | Page 36 of 56
INVERSE SINC FILTER
The inverse sinc (sinc1) filter is a nine-tap FIR filter. The composite
response of the sinc1 filter and the sin(x)/x response of the DAC
is shown in Figure 46. The composite response has a pass-band
ripple of less than ±0.05 dB up to a frequency of 0.4 × fDACCLK. To
provide the necessary peaking at the upper end of the pass band,
the inverse sinc filters shown have an intrinsic insertion loss of
about 3.2 dB. Figure 46 shows the composite frequency response.
The sinc1 filter is disabled by default. It can be enabled by setting
the bypass sinc1 bit to 0 (Register 0x1B, Bit 6).
–3.0
–3.2
–3.4
–3.6
–3.8
–4.0
0
0.5
0.3
0.4
0.2
0.1
M
AG
NI
T
UDE
(
d
B)
fOUT/fDAC
09691-
051
Figure 46. Sample Composite Responses of the Sinc1 Filter
with sin(x)/x Roll-Off
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