参数资料
| 型号： | ADM1067ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/32页 |
| 文件大小： | 0K |
| 描述： | IC SEQUENCER/SUPERVISOR 40-LFCSP |
| 标准包装： | 1 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 10 |
| 输出： | 可编程 |
| 电压 - 阀值： | 可调节/可选择 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-VQ（6x6） |
| 包装： | 托盘 |
| 配用： | EVAL-ADM1067TQEBZ-ND - BOARD EVALUATION FOR ADM1067TQ |
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ADM1067
SUPPLY MARGINING
OVERVIEW
It is often necessary for the system designer to adjust supplies,
either to optimize their level or force them away from nominal
values to characterize the system performance under these
conditions. This is a function typically performed during an in-
circuit test (ICT), such as when the manufacturer wants to
guarantee that the product under test functions correctly at
nominal supplies minus 10%.
OPEN-LOOP SUPPLY MARGINING
The simplest method of margining a supply is to implement an
open-loop technique (see Figure 27). A popular way to do this is to
switch extra resistors into the feedback node of a power module,
such as a dc-to-dc converter or low dropout regulator (LDO).
The extra resistor alters the voltage at the feedback or trim node
and forces the output voltage to margin up or down by a certain
amount.
The ADM1067 can perform open-loop margining for up to six
supplies. The six on-board voltage DACs (DAC1 to DAC6) can
drive into the feedback pins of the power modules to be margined.
The simplest circuit to implement this function is an attenuation
resistor that connects the DACx pin to the feedback node of a
dc-to-dc converter. When the DACx output voltage is set equal
to the feedback voltage, no current flows into the attenuation
resistor, and the dc-to-dc converter output voltage does not
change. Taking DACx above the feedback voltage forces current
into the feedback node, and the output of the dc-to-dc converter
is forced to fall to compensate for this. The dc-to-dc converter
output can be forced high by setting the DACx output voltage
lower than the feedback node voltage. The series resistor can be
split in two, and the node between them can be decoupled with
a capacitor to ground. This can help to decouple any noise picked
up from the board. Decoupling to a ground local to the dc-to-
dc converter is recommended.
The ADM1067 can be commanded to margin a supply up or
down over the SMBus by updating the values on the relevant
DAC output.
VIN
V OUT
To implement open-loop margining
1. Disable the six DAC outputs.
2. Set the DAC output voltage equal to the voltage on the
feedback node.
3. Enable the DAC.
4. Assert MUP (drive logic high). The DAC voltage moves down
to the value set in the DNLIM register (see the AN-698 Appli-
cation Note at www.analog.com ). The output of the dc-to-dc
converter rises to compensate for this, that is, margin up.
5. Assert MDN (drive logic high). The DAC voltage moves down
to the value set in the DPLIM register (see the AN-698
Application Note). The output of the dc-to-dc converter
drops to compensate for this, that is, margin down.
Step 1 to Step 3 ensure that when the DACx output buffer is turned
on, it has little effect on the dc-to-dc converter output. The DACx
output buffer is designed to power up without glitching. It does this
by first powering up the buffer to follow the pin voltage. It does
not drive out onto the pin at this time. When the output buffer
is properly enabled, the buffer input is switched over to the DAC,
and the output stage of the buffer is turned on. Output glitching is
negligible.
The margining method above assumes that margin up and margin
down DAC limits have been preloaded into the ADM1067 and
that only one margin up level and one margin down level are
required. Alternatively, a DACx output level can be dynamically
altered by an SMBus write to that DACx output register.
WRITING TO THE DACs
Four DAC ranges are offered. They can be placed with midcode
(Code 0x7F) at 0.6 V, 0.8 V, 1.0 V, and 1.25 V. These voltages are
placed to correspond to the most common feedback voltages.
Centering the DACx outputs in this way provides the best use of
the DAC resolution. For most supplies, it is possible to place the
DAC midcode at the point where the dc-to-dc converter output
is not modified, thereby giving half of the DAC range to margin
up and the other half to margin down.
The DAC output voltage is set by the code written to the DACx
register. The voltage is linear with the unsigned binary number
in this register. Code 0x7F is placed at the midcode voltage, as
described previously.
MICROCONTROLLER
ADM1067
OUTPUT
DC-TO-DC
CONVERTER
FEEDBACK
R1
ATTENUATION
RESISTOR, R3
DACx
DAC
DEVICE
CONTROLLER
(SMBus)
GND
R2
PCB
TRACE NOISE
DECOUPLING
CAPACITOR
Figure 27. Open-Loop Margining System Using the ADM1067
Rev. D | Page 21 of 32
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADM1067ACPZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:Super Sequencer with Open-Loop Margining DACs |
| ADM1067ASU | 功能描述:IC SUPERVISOR/SEQUENCER 48-TQFP RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 其它有关文件:STM6717 View All Specifications 标准包装:1 系列:- 类型:多压监控器 监视电压数目:2 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:1.11V，3.075V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 产品目录页面:1194 (CN2011-ZH PDF) 其它名称:497-7019-6 |
| ADM1067ASU-REEL | 制造商:Analog Devices 功能描述:Sequencer 48-Pin TQFP T/R |
| ADM1067ASU-REEL7 | 制造商:Analog Devices 功能描述:Sequencer 48-Pin TQFP T/R |
| ADM1067ASUZ | 制造商:Analog Devices 功能描述: |
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