参数资料
| 型号： | ADM1067ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 29/32页 |
| 文件大小： | 0K |
| 描述： | IC SEQUENCER/SUPERVISOR 40-LFCSP |
| 标准包装： | 1 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 10 |
| 输出： | 可编程 |
| 电压 - 阀值： | 可调节/可选择 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-VQ（6x6） |
| 包装： | 托盘 |
| 配用： | EVAL-ADM1067TQEBZ-ND - BOARD EVALUATION FOR ADM1067TQ |
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ADM1067
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To set up a 2-byte EEPROM address for a subsequent read,
write, block read, block write, or page erase. In this case, the
command byte is the high byte of EEPROM Address 0xF8
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except when
to EEPROM Address 0xFB. The only data byte is the low
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There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF), to avoid writing to
1
2
3
4
5
6
7 8
invalid addresses.
S
SLAVE
ADDRESS
W A
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
A
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
A P
?
An address crosses a page boundary. In this case, both
pages must be erased before programming.
Figure 36. Setting an EEPROM Address
Because a page consists of 32 bytes, only the three MSBs of
the address low byte are important for page erasure. The
lower five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
Note that the ADM1067 features a clock extend function for
writes to EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which limits the SMBus clock for repeated
or block write operations. The ADM1067 pulls SCL low and
extends the clock pulse when it cannot accept any more data.
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operation.
To write a single byte of data to the EEPROM. In this case,
the command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The first data byte is the low byte
of the EEPROM address, and the second data byte is the
READ OPERATIONS
The ADM1067 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1
2
3
4
5
6
7
8
9 10
1.
The master device asserts a start condition on SDA.
S
SLAVE
ADDRESS
W A
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
A
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
A DATA A P
2.
The master sends the 7-bit slave address followed by the
read bit (high).
Figure 37. Single Byte Write to the EEPROM
Block Write
In a block write operation, the master device writes a block of
3.
4.
5.
6.
The addressed slave device asserts an ACK on SDA.
The master receives a data byte.
The master asserts a NACK on SDA.
The master asserts a stop condition on SDA, and the
data to a slave device. The start address for a block write must
be set previously. In the ADM1067, a send byte operation sets
a RAM address, and a write byte/word operation sets an EEPROM
address, as follows:
transaction ends.
In the ADM1067, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by
1
2
3
4
5
6
3.
the write bit (low).
The addressed slave device asserts an ACK on SDA.
S
SLAVE
ADDRESS
R
A
DATA
A
P
4.
5.
6.
7.
8.
9.
The master sends a command code that tells the slave
device to expect a block write. The ADM1067 command
code for a block write is 0xFC (1111 1100).
The slave asserts an ACK on SDA.
The master sends a data byte that tells the slave device how
many data bytes are being sent. The SMBus specification
allows a maximum of 32 data bytes in a block write.
The slave asserts an ACK on SDA.
The master sends N data bytes.
The slave asserts an ACK on SDA after each data byte.
Figure 39. Single Byte Read from the EEPROM or RAM
10. The master asserts a stop condition on SDA to end the
transaction.
1
2
3
4
5
6
7
8
9
10
S W A COMMAND 0xFC A
A DATA A DATA A DATA A P
SLAVE
ADDRESS (BLOCK WRITE)
BYTE
COUNT
1 2 N
Figure 38. Block Write to EEPROM or RAM
Rev. D | Page 29 of 32
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相关代理商/技术参数 |
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| ADM1067ACPZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:Super Sequencer with Open-Loop Margining DACs |
| ADM1067ASU | 功能描述:IC SUPERVISOR/SEQUENCER 48-TQFP RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 其它有关文件:STM6717 View All Specifications 标准包装:1 系列:- 类型:多压监控器 监视电压数目:2 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:1.11V，3.075V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 产品目录页面:1194 (CN2011-ZH PDF) 其它名称:497-7019-6 |
| ADM1067ASU-REEL | 制造商:Analog Devices 功能描述:Sequencer 48-Pin TQFP T/R |
| ADM1067ASU-REEL7 | 制造商:Analog Devices 功能描述:Sequencer 48-Pin TQFP T/R |
| ADM1067ASUZ | 制造商:Analog Devices 功能描述: |
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