参数资料
型号: ADM1067ACPZ
厂商: Analog Devices Inc
文件页数: 30/32页
文件大小: 0K
描述: IC SEQUENCER/SUPERVISOR 40-LFCSP
标准包装: 1
系列: Super Sequencer®
类型: 序列发生器
监视电压数目: 10
输出: 可编程
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-VQ(6x6)
包装: 托盘
配用: EVAL-ADM1067TQEBZ-ND - BOARD EVALUATION FOR ADM1067TQ
ADM1067
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
be set previously. In the ADM1067, this is done by a send byte
operation to set a RAM address, or a write byte/word operation
to set an EEPROM address. The block read operation itself consists
of a send byte operation that sends a block read command to
the slave, immediately followed by a repeated start and a read
operation that reads out multiple data bytes, as follows:
Error Correction
The ADM1067 provides the option of issuing a packet error
correction (PEC) byte after a write to the RAM, a write to the
EEPROM, a block write to the RAM or EEPROM, or a block
read from the RAM or EEPROM. This option enables the user
to verify that the data received by or sent from the ADM1067 is
correct. The PEC byte is an optional byte sent after the last data
byte has been written to or read from the ADM1067. The protocol
is the same as a block read for Step 1 to Step 12 and then proceeds
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code that tells the slave
device to expect a block read. The ADM1067 command
code for a block read is 0xFD (1111 1101).
The slave asserts an ACK on SDA.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The slave asserts an ACK on SDA.
The ADM1067 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1067
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus Version 1.1 specification.
The master asserts an ACK on SDA.
as follows:
13. The ADM1067 issues a PEC byte to the master. The master
checks the PEC byte and issues another block read if the
PEC byte is incorrect.
14. A NACK is generated after the PEC byte to signal the end
of the read.
15. The master asserts a stop condition on SDA to end
the transaction.
Note that he PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
C ( x ) = x 8 + x 2 + x 1 + 1
See the SMBus Version 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
1 2 3 4 5 6 7 8 9 10 11 12
S W A COMMAND 0xFD A S
BYTE A DATA A
11.
The master receives 32 data bytes.
SLAVE
ADDRESS (BLOCK READ)
SLAVE
ADDRESS
R A
COUNT 1
12.
The master asserts an ACK on SDA after each data byte.
13.
The master asserts a stop condition on SDA to end the
13 14 15
1
transaction.
2 3
4
5 6
7
8
9
10
11
12
DATA
32
A PEC A P
S ADDRESS W A
A S ADDRESS R A COUNT A
SLAVE
COMMAND 0xFD
(BLOCK READ)
SLAVE BYTE
DATA
1
A
Figure 41. Block Read from the EEPROM or RAM with PEC
13
DATA
32
A
P
Figure 40. Block Read from the EEPROM or RAM
Rev. D | Page 30 of 32
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