参数资料
型号: ADM1276-3ACPZ-RL
厂商: Analog Devices Inc
文件页数: 4/48页
文件大小: 0K
描述: IC HOT SWAP CTLR PMBUS 20LFCSP
标准包装: 5,000
类型: 热交换控制器
应用: 通用
内部开关:
电流限制: 可调
电源电压: 2.95 V ~ 20 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-WQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-WQ(5x5)
包装: 带卷 (TR)

ADM1276
Data Sheet
SPECIFICATIONS
V CC = 2.95 V to 20 V, V CC ≥ V SENSE+ , V SENSE+ = 2 V to 20 V, V SENSE = (V SENSE+ ? V SENSE? ) = 0 V, T A = ?40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
POWER SUPPLY
Operating Voltage Range
V CC
2.95
20
V
Undervoltage Lockout
Undervoltage Hysteresis
Quiescent Current
I CC
2.4
90
2.7
120
5
V
mV
mA
V CC rising
GATE on and power monitor running
UV PIN
Input Current
I UV
100
nA
UV ≤ 3.6 V
UV Threshold
UV Threshold Hysteresis
UV TH
UV HYST
0.97
40
1.0
50
1.03
60
V
mV
UV falling
UV Glitch Filter
UV Propagation Delay
UV GF
UV PD
2
5
7
8
μs
μs
50 mV overdrive
UV low to GATE pull-down active
OV PIN
Input Current
I OV
100
nA
OV ≤ 3.6 V
OV Threshold
OV Threshold Hysteresis
OV TH
OV HYST
0.97
50
1.0
60
1.03
70
V
mV
OV rising
OV Glitch Filter
OV Propagation Delay
OV GF
OV PD
0.5
1.0
1.5
2
μs
μs
50 mV overdrive
OV high to GATE pull-down active
SENSE+ AND SENSE? PINS
Input Current
Input Imbalance
I SENSEx
I ΔSENSE
150
5
μA
μA
Per individual pin; SENSE+, SENSE? = 20 V
I ΔSENSE = (I SENSE+ ) ? (I SENSE? )
VCAP PIN
Internally Regulated
Voltage
V VCAP
2.66
2.7
2.74
V
0 μA ≤ I VCAP ≤ 100 μA; C VCAP = 1 μF
ISET PIN
Reference Select Threshold
Internal Reference
Gain of Current Sense
V ISETRSTH
V CLREF
AV CSAMP
1.35
1.5
1
50
1.65
V
V
V/V
If V ISET > V ISETRSTH , an internal 1 V reference (V CLREF ) is used
Accuracies included in total sense voltage accuracies
Accuracies included in total sense voltage accuracies
Amplifier
Input Current
I ISET
100
nA
V ISET ≤ V VCAP
GATE PIN
Maximum voltage on the gate is always clamped to ≤31 V
Gate Drive Voltage
ΔV GATE
ΔV GATE = V GATE ? V SENSE+
10
4.5
8
4.5
12
14
13
10
6
V
V
V
V
15 V ≥ V CC ≥ 8 V; I GATE ≤ 5 μA
20 V ≥ V CC ≥ 15 V; I GATE ≤ 5 μA
V SENSE+ = V CC = 5 V; I GATE ≤ 5 μA
V SENSE+ = V CC = 2.95 V; I GATE ≤ 1 μA
Gate Pull-Up Current
I GATEUP
?20
?30
μA
V GATE = 0 V
Gate Pull-Down Current
I GATEDN
Regulation
Slow
Fast
I GATEDN_REG
I GATEDN_SLOW
I GATEDN_FAST
45
5
750
60
10
1500
75
15
2000
μA
mA
mA
V GATE ≥ 2 V; V ISET = 1.0 V; (SENSE+) ? (SENSE?) = 30 mV
V GATE ≥ 2 V
V GATE ≥ 12 V; V CC ≥ 12 V
Gate Holdoff Resistance
20
?
V CC = 0 V
HOT SWAP SENSE VOLTAGE
Hot Swap Sense Voltage
V SENSECL
19.6
20
20.4
mV
V ISET > 1.65 V; V FLB > 1.12 V; V GATE = (SENSE+) + 3 V; I GATE = 0 μA;
Current Limit
Foldback Inactive
V SS ≥ 2 V
V GATE = (SENSE+) + 3 V; I GATE = 0 μA; V SS ≥ 2 V
24.6
19.6
9.6
4.6
25
20
10
5
25.4
20.4
10.4
5.4
mV
mV
mV
mV
V ISET = 1.25 V; V FLB > 1.395 V
V ISET = 1.0 V; V FLB > 1.12 V
V ISET = 0.5 V; V FLB > 0.57 V
V ISET = 0.25 V; V FLB > 0.295 V
Rev. C | Page 4 of 48
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