参数资料
型号: ADP5020CP-EVALZ
厂商: Analog Devices Inc
文件页数: 5/28页
文件大小: 0K
描述: BOARD EVAL PMU IMAGING ADP5020
设计资源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
标准包装: 1
主要目的: DC/DC,LDO 步降
输出及类型: 3,非隔离
输出电压: 3.3V,1.2V,1.8V
电流 - 输出: 600mA,250mA,150mA
输入电压: 2.4 ~ 5.5 V
稳压器拓扑结构: 降压
频率 - 开关: 3MHz
板类型: 完全填充
已供物品: 2 板,CD
已用 IC / 零件: ADP5020
ADP5020
SWITCHING SPECIFICATIONS
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SWITCHING FREQUENCY
CH1
CH2
f SW1
f SW2
Sync disabled
Sync disabled
2.5
2.5
3
3
3.6
3.6
MHz
MHz
SYNC CLOCK DIVIDER RATIO
SYNC CHARACTERISTICS
Frequency Range
RATIO DIV
RATIO DIV
SYNC_9P6 = 1
SYNC_19P2 = 1
3
6
f SYNC1
f SYNC2
9.6
19.2
MHz
MHz
Frequency Duty Cycle
f SYNCDUTY
40
50
60
%
Signal
DC Coupling Level
Low Level Input Voltage
High Level Input Voltage
V IL
V IH
0.7 × V DD_IO
0.3 × V DD_IO
V
V
DC Coupling
V SYNC
0
V DD_IO
V
AC Coupling Level
V CAC-PP
Sine wave, peak-to-peak
0.5
1.0
V DD_IO
V
AC Coupling Capacitor
10
nF
Input Current
I SYNC
SYNC_9P6 = 1, or SYNC_19P2 = 1
50
μA
DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 1 REGULATOR
Table 3.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT VOLTAGE
Range 1
Initial Accuracy
Total Accuracy
V OUT1
3-bit range
T A = 25 ° C, V DD1 2 , V OUT1 = 3.3 V, I LOAD = 20 mA
V DD1 3 , I LOAD = 50 mA to 600 mA
2.5
?1
?5
3.7
+1
+4
V
%
%
VOUT1 REGULATION
Load Regulation
Line Regulation
I LOAD = 20 mA to 600 mA
V DDA = 1.8 V, V DD12, 3
0.2
0.15
%
%
CURRENT
Maximum Output Current
I BK1MAX
V DD13 , V OUT1 = 2.5 V to 3.7 V
600
mA
Quiescent Current
I QBK1
I LOAD = 0 mA
4
6
mA
POWER
Low-Side Power nMOSFET
High-Side Power pMOSFET
SWITCH CURRENT LIMIT
MINIMUM ON TIME
MAXIMUM DUTY CYCLE
SOFT START TIME
C OUT DISCHARGE SWITCH ON RESISTANCE
R DSON1
R DSON1
I CL1
t MIN1
D MAX1
t SS1
R DIS1
I D = 400 mA
I D = 400 mA
0.8
0.7
175
250
1.2
55
88
1.4
1
250
400
1.6
95
1.3
A
ns
%
ms
1
2
3
See Table 13 (the BUCK1_VSEL register, Address 0x01) for details.
V DD1 = 3.1 V to 5.5 V, I LOAD is less than 200 mA. For tight regulation, the supply voltage must be 0.6 V higher than the output voltage.
V DD1 = 3.7 V to 5.5 V, I LOAD is more than 200 mA. For tight regulation, the supply voltage must be 1.2 V higher than the output voltage.
Rev. 0 | Page 5 of 28
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