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参数资料
| 型号： | ADSP-21160NCB-100 |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 64-BIT, 50 MHz, OTHER DSP, PBGA400 |
| 封装： | 27 X 27 MM, METRIC, PLASTIC, MS-034BAL-2, BGA-400 |
| 文件页数： | 6/60页 |
| 文件大小： | 1296K |
| 代理商： | ADSP-21160NCB-100 |
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Rev. B
|
Page 14 of 60
|
February 2010
ADSP-21160M/ADSP-21160N
CLKOUT
O/T
Local Clock Out. CLKOUT is driven at the CLKIN frequency by the processor. This output can be
three-stated by setting the COD bit in the SYSCON register. A keeper latch on the DSP’s CLKOUT
pin maintains the output at the level it was last driven (only enabled on the processor with
ID2-0 = 00x). Do not use CLKOUT in multiprocessing systems; use CLKIN instead.
RESET
I/A
Processor Reset. Resets the ADSP-21160x to a known state and begins execution at the program
memory location specified by the hardware reset vector address. The RESET input must be asserted
(low) at power-up.
TCK
I
Test Clock (JTAG). Provides a clock for JTAG boundary scan.
TMS
I/S
Test Mode Select (JTAG). Used to control the test state machine. TMS has a 20 k
Ω internal pull-up
resistor.
TDI
I/S
Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a 20 k
Ω internal
pull-up resistor.
TDO
O
Test Data Output (JTAG). Serial scan output of the boundary scan path.
TRST
I/A
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after power-
up or held low for proper operation of the ADSP-21160x. TRST has a 20 k
Ω internal pull-up resistor.
EMU
O (O/D)
Emulation Status. Must be connected to the ADSP-21160x emulator target board connector only.
EMU has a 50 k
Ω internal pull-up resistor.
CIF
O/T
Core Instruction Fetch. Signal is active low when an external instruction fetch is performed. Driven
by bus master only. Three-state when host is bus master. CIF has a 20 k
Ω internal pull-up resistor
that is enabled on the ADSP-21160x with ID2–0 = 00x.
VDDINT
P
Core Power Supply. Nominally 2.5 V (ADSP-21160M) or 1.9 V (ADSP-21160N) dc and supplies the
DSP’s core processor
VDDEXT
P
I/O Power Supply. Nominally 3.3 V dc.
AVDD
P
Analog Power Supply. Nominally 2.5 V (ADSP-21160M) or 1.9 V (ADSP-21160N) dc and supplies the
DSP’s internal PLL (clock generator). This pin has the same specifications as VDDINT, except that added
filtering circuitry is required. For more information, see Power Supplies on page 8.
AGND
G
Analog Power Supply Return.
GND
G
Power Supply Return.
NC
Do Not Connect. Reserved pins that must be left open and unconnected.
Table 4. Boot Mode Selection
EBOOT
LBOOT
BMS
Booting Mode
1
0
Output
EPROM (Connect BMS to EPROM chip select.)
0
1 (Input)
Host Processor
0
1
1 (Input)
Link Port
0
0 (Input)
No Booting. Processor executes from external memory.
010 (Input)
Reserved
1
x (Input)
Reserved
Table 3. Pin Function Descriptions (Continued)
Pin
Type
Function
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-21160NCB-TBD | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-21160NCBZ-100 | 功能描述:IC DSP CONTROLLER 32BIT 400-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:SHARC® 标准包装:40 系列:TMS320DM64x, DaVinci™ 类型:定点 接口:I²C，McASP，McBSP 时钟速率:400MHz 非易失内存:外部 芯片上RAM:160kB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:0°C ~ 90°C 安装类型:表面贴装 封装/外壳:548-BBGA，FCBGA 供应商设备封装:548-FCBGA（27x27） 包装:托盘 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21160NCE-100 | 制造商:Analog Devices 功能描述: |
| ADSP-21160NKB-100 | 功能描述:IC DSP CONTROLLER 32BIT 400BGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-21160NKB-95 | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
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