参数资料
型号: ADSP-21160NCB-100
厂商: ANALOG DEVICES INC
元件分类: 数字信号处理
英文描述: 64-BIT, 50 MHz, OTHER DSP, PBGA400
封装: 27 X 27 MM, METRIC, PLASTIC, MS-034BAL-2, BGA-400
文件页数: 8/60页
文件大小: 1296K
代理商: ADSP-21160NCB-100
Rev. B
|
Page 16 of 60
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February 2010
ADSP-21160M/ADSP-21160N
ELECTRICAL CHARACTERISTICS—ADSP-21160M
Table 6 shows ADSP-21160M electrical characteristics. These
specifications are subject to change without notification.
Table 6. Electrical Characteristics—ADSP-21160M
Parameter
Test Conditions
Min
Max
Unit
VOH
High Level Output Voltage
1
@ VDDEXT =Min, IOH=–2.0 mA
2
2.4
V
VOL
Low Level Output Voltage
@ VDDEXT =Min, IOL=4.0 mA
0.4
V
IIH
High Level Input Current
3, 4, 5
@ VDDEXT =Max, VIN=VDD Max
10
μA
IIL
Low Level Input Current3
@ VDDEXT =Max, VIN=0 V
10
μA
IILPU1
Low Level Input Current Pull-Up14
@ VDDEXT =Max, VIN=0 V
250
μA
IILPU2
Low Level Input Current Pull-Up25
@ VDDEXT =Max, VIN=0 V
500
μA
IOZH
Three-State Leakage Current
6, 7, 8, 9
@ VDDEXT=Max, VIN=VDD Max
10
μA
IOZL
Three-State Leakage Current
@ VDDEXT =Max, VIN=0 V
10
μA
IOZHPD
Three-State Leakage Current Pull-Down
@ VDDEXT =Max, VIN=VDD Max
250
μA
IOZLPU1
Three-State Leakage Current Pull-Up17
@ VDDEXT =Max, VIN=0 V
250
μA
IOZLPU2
Three-State Leakage Current Pull-Up28
@ VDDEXT =Max, VIN=0 V
500
μA
IOZHA
Three-State Leakage Current10
@ VDDEXT =Max, VIN=VDD Max
25
μA
IOZLA
Three-State Leakage Current
@ VDDEXT =Max, VIN=0 V
4
mA
IDD-INPEAK
Supply Current (Internal)
11
tCCLK=12.5 ns, VDDINT=Max
1400
mA
IDD-INHIGH
Supply Current (Internal)
12
tCCLK=12.5 ns, VDDINT=Max
875
mA
IDD-INLOW
Supply Current (Internal)13
tCCLK=12.5 ns, VDDINT=Max
625
mA
IDD-IDLE
Supply Current (Idle)14
tCCLK=12.5 ns, VDDINT=Max
400
mA
AIDD
Supply Current (Analog)15
@AVDD=Max
10
mA
CIN
Input Capacitance16, 17
fIN=1 MHz, TCASE=25°C, VIN=2.5 V
4.7
pF
1 Applies to output and bidirectional pins: DATA63–0, ADDR31–0, MS3–0, RDx, WRx, PAGE, CLKOUT, ACK, FLAG3–0, TIMEXP, HBG, REDY, DMAG1, DMAG2, BR6–1,
PA, BRST, CIF, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT7–0, LxCLK, LxACK, BMS, TDO, and EMU.
2 See Output Drive Currents on page 47 for typical drive current capabilities.
3 Applies to input pins: SBTS, IRQ2–0, HBR, CS, ID2–0, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK, and CLK_CFG3-0.
4 Applies to input pins with internal pull-ups: DR0, and DR1.
5 Applies to input pins with internal pull-ups: DMARx, TMS, TDI, and TRST.
6 Applies to three-statable pins: DATA63–0, ADDR31–0, PAGE, CLKOUT, ACK, FLAG3–0, REDY, HBG, BMS, BR6–1, TFSx, RFSx, and TDO.
7 Applies to three-statable pins with internal pull-ups: DTx, TCLKx, RCLKx, and EMU.
8 Applies to three-statable pins with internal pull-ups: MS3–0,RDx, WRx, DMAGx, PA, and CIF.
9 Applies to three-statable pins with internal pull-downs: LxDAT7–0, LxCLK, and LxACK.
10Applies to ACK pulled up internally with 2 k
Ω during reset or ID2–0 = 00x.
11The test program used to measure I
DD-INPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power
measurements made using typical applications are less than specified. For more information, see Power Dissipation on Page 47.
12I
DD-INHIGH is a composite average based on a range of high activity code. For more information, see Power Dissipation on Page 47.
13IDD-INLOW is a composite average based on a range of low activity code. For more information, see Power Dissipation on Page 47.
14Idle denotes ADSP-21160M state during execution of IDLE instruction. For more information, see Power Dissipation on Page 47.
15Characterized, but not tested.
16Applies to all signal pins.
17Guaranteed, but not tested.
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