参数资料
型号: AGLN250V2-CS81
元件分类: FPGA
英文描述: FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81
封装: 5 X 5 MM, 0.8 MM HEIGHT, 0.5 MM PITCH, CSP-81
文件页数: 39/140页
文件大小: 4325K
代理商: AGLN250V2-CS81
Re vi s i on 10
4-1
4 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each version of the IGLOO nano datasheet.
Revision
Changes
Page
Revision 10
(April 2010)
References to differential inputs were removed from the datasheet, since IGLOO
nano devices do not support differential inputs (SAR 21449).
N/A
A parenthetical note, "hold previous I/O state in Flash*Freeze mode," was added
to each occurrence of bus hold in the datasheet (SAR 24079).
N/A
1.2 V programming.
The note connected with the "IGLOO nano Ordering Information" table was
revised to clarify features not available for Z feature grade devices.
The definition of C in the "Temperature Grade Offerings" table was changed to
"extended commercial temperature range."
1.2 V wide range was added to the list of voltage ranges in the "I/Os with
regarding switching from 1.2 V to 1.5 V core voltage for in-system programming.
The VJTAG voltage was changed from "1.425 to 3.6" to "1.4 to 3.6" (SAR 24052).
The note regarding voltage for programming V2 and V5 devices was revised
(SAR 25213). The maximum value for VPUMP programming voltage (operation
mode) was changed from 3.45 V to 3.6 V (SAR 25220).
The tables in the "Quiescent Supply Current" section were updated (SAR 24882
and SAR 24112).
Characteristics, IGLOO nano Sleep Mode* (SARs 24112, 24882, and 79503).
The note stating what was included in IDD was removed from Table 2-11
The note, "per VCCI or VJTAG bank" was removed from Table 2-12 Quiescent
was changed to "IDD = NBANKS * ICCI + ICCA."
pin) – Default I/O Software Settings1 were updated. Wide range support
information was added.
相关PDF资料
PDF描述
AGLN250V2-ZCS81I FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81
AGLN250V2-ZCS81 FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81
AGLN030V2-ZCS81I FPGA, 768 CLBS, 30000 GATES, 250 MHz, PBGA81
AGLN030V2-ZCS81 FPGA, 768 CLBS, 30000 GATES, 250 MHz, PBGA81
AGLN030V2-ZQN48I FPGA, 768 CLBS, 30000 GATES, 250 MHz, QCC48
相关代理商/技术参数
参数描述
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