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参数资料
| 型号： | AGLN250V2-CS81 |
| 元件分类： | FPGA |
| 英文描述： | FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81 |
| 封装： | 5 X 5 MM, 0.8 MM HEIGHT, 0.5 MM PITCH, CSP-81 |
| 文件页数： | 42/140页 |
| 文件大小： | 4325K |
| 代理商： | AGLN250V2-CS81 |
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Datasheet Information
4- 4
R ev isio n 1 0
Revision 1
(November 2008)
The "Advanced I/Os" section was updated to include wide power supply voltage
support for 1.14 V to 1.575 V.
The AGLN030 device was added to product tables and replaces AGL030 entries
that were formerly in the tables.
The "I/Os Per Package"table was updated for the CS81 package to change the
number of I/Os for AGLN060, AGLN125, and AGLN250 from 66 to 64.
The "Wide Range I/O Support" section is new.
The following tables and sections were updated to add the UC81 and CS81
packages for AGL030:
N/A
The "I/Os Per Package" table was updated to add the following information to
table note 4: "For nano devices, the VQ100 package is offered in both leaded and
RoHS-compliant versions. All other packages are RoHS-compliant only."
updated to remove QN100 for AGLN250.
The device architecture figures, Figure 1-3 IGLOO Device Architecture
Device Architecture Overview with Four I/O Banks (AGLN250), were revised.
RAM (AGLN010 and AGLN030) is new.
through
The "PLL and CCC" section was revised to include information about CCC-GLs in
AGLN020 and smaller devices.
The "I/Os with Advanced I/O Standards" section was revised to add information
about IGLOO nano devices supporting double-data-rate applications.
The table notes and references were revised in Table 2-2 Recommended
Operating Conditions 1. VMV was included with VCCI and a table note was
added stating, "VMV pins must be connected to the corresponding VCCI pins.
See Pin Descriptions for further information." Please review carefully.
VJTAG was added to the list in the table note for Table 2-9 Quiescent Supply
added for AGLN010, AGLN015, and AGLN030 for 1.5 V.
VCCI was removed from the list in the table note for Table 2-10 Quiescent
Values for ICCA current were updated for AGLN010, AGLN015, and AGLN030 in
Values for PAC1 and PAC2 were added to Table 2-15 Different Components
Table notes regarding wide range support were added to Table 2-21 Summary
Revision
Changes
Page
相关PDF资料 |
PDF描述 |
|---|---|
| AGLN250V2-ZCS81I | FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81 |
| AGLN250V2-ZCS81 | FPGA, 6144 CLBS, 250000 GATES, 250 MHz, PBGA81 |
| AGLN030V2-ZCS81I | FPGA, 768 CLBS, 30000 GATES, 250 MHz, PBGA81 |
| AGLN030V2-ZCS81 | FPGA, 768 CLBS, 30000 GATES, 250 MHz, PBGA81 |
| AGLN030V2-ZQN48I | FPGA, 768 CLBS, 30000 GATES, 250 MHz, QCC48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AGLN250V2-CSG81 | 功能描述:IC FPGA 250K 1.2-1.5V CSP81 RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO nano 标准包装:24 系列:ECP2 LAB/CLB数:1500 逻辑元件/单元数:12000 RAM 位总计:226304 输入/输出数:131 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP（28x28） |
| AGLN250V2-CSG81I | 功能描述:IC FPGA NANO 1KB 250K 81-CSP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
| AGLN250V2-DIELOT | 制造商:Microsemi Corporation 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:Microsemi SOC Products Group 功能描述:AGLN250V2-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film |
| AGLN250V2-QNG100I | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO NANO FAMILY 250K GATES 130NM (CMOS) TECHNOLOGY 1. - Trays |
| AGLN250V2-VQ100 | 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
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