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参数资料
| 型号： | BX80524P300000 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 300 MHz, MICROPROCESSOR, PPGA370 |
| 封装： | 1.950 X 1.950 INCH, HEAT SINK, STAGGERED, PLASTIC, PGA-370 |
| 文件页数： | 15/88页 |
| 文件大小： | 1622K |
| 代理商： | BX80524P300000 |
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Intel Celeron Processor
22
Datasheet
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VCC
CORE and ICCCORE supply the processor core.
3. These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required.
4. Use the Typical Voltage specification with the Tolerance specifications to provide correct voltage regulation to
the processor.
5. VTT must be held to 1.5 V ± 9%. It is recommended that V TT be held to 1.5 V ± 3% while the Intel
Celeron
processor system bus is idle. This is measured at the processor edge fingers.
6. These are the tolerance requirements, across a 20 MHz bandwidth, at the SC242 connector pin on the
bottom side of the baseboard. The requirements at the SC242 connector pins account for voltage drops
(and impedance discontinuities) across the connector, processor edge fingers, and to the processor core.
VCC
CORE must return to within the static voltage specification within 100 s after a transient event.
7. These are the tolerance requirements, across a 20 MHz bandwidth, at the processor edge fingers. The
requirements at the processor edge fingers account for voltage drops (and impedance discontinuities) at the
processor edge fingers and to the processor core. VCC
CORE must return to within the static voltage
specification within 100
s after a transient event.
8. These are the tolerance requirements, across a 20 MHz bandwidth, at the top of the PPGA package.
VCC
CORE must return to within the static voltage specification within 100 s after a transient event.
9. Max ICC
CORE measurements are measured at VCCCORE max voltage (VCCCORE_TYP + maximum static tolerance),
under maximum signal loading conditions.
10.Voltage regulators may be designed with a minimum equivalent internal resistance to ensure that the output
voltage, at maximum current output, is no greater than the nominal (i.e., typical) voltage level of VCC
CORE
(VCC
CORE_TYP). In this case, the maximum current level for the regulator, ICCCORE_REG, can be reduced from the
specified maximum current ICC
CORE_MAX and is calculated by the equation:
ICC
CORE_REG = ICCCORE_MAX × VCCCORE_TYP / (VCCCORE_TYP + VCCCORE Tolerance, Transient)
11. The current specified is the current required for a single Intel Celeron processor. A similar amount of current
is drawn through the termination resistors on the opposite end of the AGTL+ bus, unless single-ended
termination is used (see Section 2.1).
12.The current specified is also for AutoHALT state.
13.Maximum values are specified by design/characterization at nominal VCC
CORE.
14.Based on simulation and averaged over the duration of any change in current. Use to compute the maximum
inductance tolerable and reaction time of the voltage regulator. This parameter is not tested.
15.dICC/dt specifications are measured and specified at the SC242 connector pins.
16.dICC/dt specifications are measured and specified at the PPGA package’s processor pins.
IDSLP
ICC Deep Sleep for
processor core
0.80
A
ICC
CMOS
ICC for VCC
CMOS
500
mA
dICC
CORE/dt
Power supply current
slew rate
20
A/s
13, 14, 15
dICC
CORE/dt
Power supply current
slew rate
240
A/s
13, 14, 16
dICCvTT/dt
Termination current
slew rate
8A/s
See
Table 4.
Intel Celeron Processor Voltage and Current Specifications 1
Symbol
Parameter
Core Freq
Min
Typ
Max
Unit
Notes
Table 5.
AGTL+ Signal Groups DC Specifications 1
Symbol
Parameter
Min
Max
Unit
Notes
VIL
Input Low Voltage
–0.3
0.82
V
VIH
Input High Voltage
1.22
VTT
V2, 3
RON
Buffer On Resistance
16.67
8
IL
Leakage Current for
inputs, outputs, and I/O
±100
A
6, 7
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