参数资料
型号: C9832HT
英文描述: Up to 5A ULDO linear regulator
中文描述: CPU系统时钟发生器|采用TSSOP | 56PIN |塑料
文件页数: 12/24页
文件大小: 169K
代理商: C9832HT
C9832H
High Performance Pentium 4 Clock Synthesizer
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07109 Rev. **
5/24/2001
Page 12 of 24
Approved Product
1.2V
0V
Iout
Iout
Ros
Ro
VDD3 (3.3V +/- 5%)
Vout = 1.2V max
Vout
Slope ~ 1/R
0
Host Clock (HCSL) Buffer Characteristics
Characteristic
Ro
Ros
Vout
Iout is selectable depending on implementation. The parameters above apply to all configurations. Vout is the voltage
at the pin of the device.
Minimum
3000 Ohms (recommended)
Maximum
N/A
N/A
1.2V
The various output current configurations are shown in the host swing select functions table. For all configurations, the
deviation from the expected output current is +/- 7% as shown in the current accuracy table.
CPU Clock Current Select Function
Mult0
Board Target Trace/Term Z
0
1
Reference R, Iref – Vdd (3*Rr)
Rr = 221 1%, Iref = 5.00mA
Rr = 475 1%, Iref = 2.32mA
Output Current
Ioh = 4*Iref
Ioh = 6*Iref
Voh @ Z
1.0V @ 50
0.7V @ 50
50 Ohms
50 Ohms
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