参数资料
| 型号： | CS5301GDWR32G |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/19页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 32-SOIC |
| 产品变化通告： | Product Obsolescence 24/Jan/2011 |
| 标准包装： | 1 |
| PWM 型： | 电流/电压模式，V²? |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 4.7 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 32-SOIC（0.295"，7.50mm 宽） |
| 包装： | 剪切带 (CT) |
| 其它名称： | CS5301GDWR32GOSCT |
CS5301
+12 V
+5.0 V
D1
D3
+12 V
BAT54S
BAT54S
L4
300 nH
D2
BAS16LT1
C12
1.0 nF
R10
10 K
C1
1.0 m F
C3
1.0 m F
C2
1.0 m F
+ C15,16
2 × 16SP180M
+5.0 V
Q1
CS1
C11
1.0 nF
C4
R3
R4
1.0 W
L1
1.0 m F
0.1 m F
56.2 K
C10
470 pF
R9
19.1 k
R8
80.6 k
COMP
V FB
V DRP
U1
R OSC
V CCL
V CCL1
C14
1.0 m F
Q2
C17?24
8 × 4SP560M
R11
10 k
CS1
CS2
Gate(L)1
GND1
+5.0 V
CS3
CS REF
Gate(H)1
V CCH12
Q3
CS2
PWRGD
V ID0
V ID1
V ID2
R12
20 K
PWRGD
V ID0
V ID1
V ID2
V ID3
V ID4
PWRGDS
I LIM
REF
Gate(H)2
GND2
Gate(L)2
V CCL23
Gate(L)3
GND3
Gate(H)3
V CCH3
LGND
Q4
L2
1.0 m F
C25?32
8 × 10 m F
V ID3
V ID4
R1
3.09 k
R2
C5
0.1 m F
Q5
CS3
L3
V CORE
1.40 k
1.0 m F
R5
30 k
R6
30 k
C6
.01 m F
C7
.01 m F
R7
30 k
CS3
Q6
C8
.01 m F
CS1
C9
.01 m F
CS2
Q1?Q6, NTB85N03 or NTB85N03T4 by ON Semiconductor
Figure 1. Application Diagram for Intel Pentium ? 4 Processor 12 V to 1.7 V, 42 A
MAXIMUM RATINGS*
Rating
Operating Junction Temperature
Storage Temperature Range
ESD Susceptibility (Human Body Model)
Thermal Resistance, Junction?to?Case, R q JC
Thermal Resistance, Junction?to?Ambient, R q JA
Value
150
?65 to +150
2.0
14
70
Unit
° C
° C
kV
° C/W
° C/W
Lead Temperature Soldering:
Reflow: (SMD styles only) (Note 1)
230 peak
° C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183 ° C.
*The maximum package power dissipation must be observed.
http://onsemi.com
2
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