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参数资料
| 型号： | DC859A |
| 厂商： | Linear Technology |
| 文件页数： | 4/32页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR LTC4267 |
| 设计资源： | DC859A Design File DC859A Schematic |
| 标准包装： | 1 |
| 主要目的： | 电源管理，以太网供电（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4267 |
| 已供物品： | 板 |
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LTC4267
12
4267fc
VPORTP
VPORTN
LTC4267
4267 F03
25k SIGNATURE
RESISTOR
SIGNATURE DISABLE
SIGDISA
9k
16k
TO
PSE
Figure 3. 25k Signature Resistor with Disable
Classication
Once the PSE has detected a PD, the PSE may option-
ally classify the PD. Classication provides a method for
more efcient allocation of power by allowing the PSE
to identify lower power PDs and allocate less power for
these devices. The IEEE 802.3af specication denes ve
classes (Table 2) with varying power levels. The designer
selects the appropriate classication based on the power
consumption of the PD. For each class, there is an as-
sociated load current that the PD asserts onto the line
during classication probing. The PSE measures the PD
load current to determine the proper classication and
PD power requirements.
During classication (Figure 4), the PSE presents a xed
voltage between – 15.5V and – 20.5V to the PD. With the
input voltage in this range, the LTC4267 asserts a load
current from the VPORTP pin through the RCLASS resistor.
The magnitude of the load current is set by the RCLASS
resistor. The resistor values associated with each class
are shown in Table 2. Note that the switching regulator
will not interfere with the classication measurement since
the LTC4267 has not passed power to the regulator.
Table 2. Summary of IEEE 802.3af Power Classications and
LTC4267 RCLASS Resistor Selection
Maximum
Nominal
LTC4267
Power Levels
Classication
RCLASS
at Input of PD
Load Current
Resistor
Class
Usage
(W)
(mA)
(Ω, 1%)
0
Default
0.44 to 12.95
<5
Open
1
Optional
0.44 to 3.84
10.5
124
2
Optional
3.84 to 6.49
18.5
68.1
3
Optional
6.49 to 12.95
28
45.3
4
Reserved
Reserved*
40
30.9
*Class 4 is currently reserved and should not be used.
The IEEE 802.3af specication limits the classication
time to 75ms because a signicant amount of power is
dissipated in the PD. The LTC4267 is designed to handle the
power dissipation for this time period. If the PSE probing
exceeds 75ms, the LTC4267 may overheat. In this situation,
the thermal protection circuit will engage and disable the
classication current source in order to protect the part.
The LTC4267 stays in classication mode until the input
voltage rises above the UVLO turn-on voltage.
VPORTN Undervoltage Lockout
The IEEE specication dictates a maximum turn-on voltage
of 42V and a minimum turn-off voltage of 30V for the PD.
In addition, the PD must maintain large on-off hysteresis
to prevent resistive losses in the wiring between the PSE
and the PD from causing start-up oscillation. The LTC4267
incorporates an undervoltage lockout (UVLO) circuit that
monitors the line voltage at VPORTN to determine when
to apply power to the integrated switching regulator
(Figure 5). Before the power is applied to the switching
regulator, the POUT pin is high impedance and sitting at
the ground potential since there is no charge on capacitor
C1. When the input voltage rises above the UVLO turn-on
threshold, the LTC4267 removes the detection and clas-
sication loads and turns on the internal power MOSFET.
C1 charges up under the LTC4267 current limit control
and the POUT pin transitions from 0V to VPORTN. This
sequence is shown in Figure 1. The LTC4267 includes
a hysteretic UVLO circuit on VPORTN that keeps power
applied to the load until the input voltage falls below the
UVLO turn-off threshold. Once the input voltage drops
below –30V, the internal power MOSFET is turned off and
Figure 4. IEEE 802.3af Classication Probing
APPLICATIO S I FOR ATIO
WU
UU
VPORTP
RCLASS
VPORTN
LTC4267
CONSTANT
LOAD
CURRENT
INTERNAL
TO LTC4267
4267 F04
RCLASS
CURRENT PATH
V
PD
PSE
PSE CURRENT MONITOR
PSE
PROBING
VOLTAGE
SOURCE
–15.5V TO –20.5V
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