参数资料
| 型号： | DS1873T+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 25/86页 |
| 文件大小： | 0K |
| 描述： | IC CTLR SFP+ ANLG LDD 28-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 60 |
| 类型： | 激光二极管控制器 |
| 通道数： | 1 |
| 电源电压： | 2.85 V ~ 3.9 V |
| 电流 - 电源： | 2.5mA |
| 工作温度： | -40°C ~ 95°C |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 其它名称： | 90-1873T+000 |
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SFP+ Controller with Analog LDD Interface
= 1, the master reads data from the slave. If an
incorrect slave address is written, the DS1873
assumes the master is communicating with another
I 2 C device and ignores the communications until the
next START condition is sent. If the main device’s
slave address is programmed to be A0h, access to
the auxiliary memory is disabled.
Memory address: During an I 2 C write operation to
the DS1873, the master must transmit a memory
address to identify the memory location where the
slave is to store the data. The memory address is
always the second byte transmitted during a write
operation following the slave address byte.
I 2 C Protocol
Writing a single byte to a slave: The master must
generate a START condition, write the slave address
byte (R/ W = 0), write the memory address, write the
byte of data, and generate a STOP condition.
Remember the master must read the slave ’s
acknowledgement during all byte-write operations.
Writing multiple bytes to a slave: To write multiple
bytes to a slave, the master generates a START con-
dition, writes the slave address byte (R/ W = 0),
TYPICAL I 2 C WRITE TRANSACTION
writes the memory address, writes up to 8 data
bytes, and generates a STOP condition. The
DS1873 writes 1 to 8 bytes (one page or row) with a
single write transaction. This is internally controlled
by an address counter that allows data to be written
to consecutive addresses without transmitting a
memory address before each data byte is sent. The
address counter limits the write to one 8-byte page
(one row of the memory map). Attempts to write to
additional pages of memory without sending a STOP
condition between pages results in the address
counter wrapping around to the beginning of the
present row.
For example, a 3-byte write starts at address 06h
and writes three data bytes (11h, 22h, and 33h) to
three “consecutive” addresses. The result is that
addresses 06h and 07h would contain 11h and 22h,
respectively, and the third data byte, 33h, would be
written to address 00h.
To prevent address wrapping from occurring, the
master must send a STOP condition at the end of
the page, then wait for the bus-free or EEPROM
write time to elapse. Then the master can generate a
new START condition and write the slave address
MSB
LSB
MSB
LSB
MSB
LSB
START
1
0
1
0
0
0
1
R/W
SLAVE
ACK
b7
b6
b5
b4
b3
b2
b1
b0
SLAVE
ACK
b7
b6
b5
b4
b3
b2
b1
b0
SLAVE
ACK
STOP
SLAVE
ADDRESS*
READ/
WRITE
REGISTER ADDRESS
DATA
*IF ASEL IS 0, THE SLAVE ADDRESS IS A0h FOR THE AUXILIARY MEMORY AND A2h FOR THE MAIN MEMORY.
IF ASEL = 1, THE SLAVE ADDRESS IS DETERMINED BY TABLE 02h, REGISTER 8Ch FOR THE MAIN MEMORY. THE AUXILIARY MEMORY CONTINUES TO BE ADDRESSED AT A0h, EXCEPT WHEN THE PROGRAMMED
ADDRESS FOR THE MAIN MEMORY IS A0h.
EXAMPLE I 2 C TRANSACTIONS WITH A2h AS THE MAIN MEMORY DEVICE ADDRESS
A2h
BAh
00h
A) SINGLE-BYTE WRITE
-WRITE 00h TO REGISTER BAh
START 1 0 1 0 0 0 1 0
SLAVE
ACK
10111010
SLAVE
ACK
00000000
SLAVE
ACK
STOP
A2h
BAh
A3h
DATA
START 1 0 1 0 0 0 1 0 SLAVE 1 0 1 1 1 0 1 0 SLAVE
1 0 1 0 0 0 1 1 SLAVE
B) SINGLE-BYTE READ
-READ REGISTER BAh
ACK ACK
REPEATED
START
ACK
DATA IN BAh
MASTER
NACK
STOP
START 1 0 1 0 0 0 1 0 SLAVE 1 1 0 0 1 0 0 0 SLAVE 0 0 0 0 0 0 0 1 SLAVE 0 1 1 1 0 1 0 1 SLAVE
C) TWO-BYTE WRITE
-WRITE 01h AND 75h
TO C8h AND C9h
A2h C8h 01h 75h
ACK ACK ACK ACK
STOP
A2h
C8h
A3h
DATA
DATA
D) TWO-BYTE READ
-READ C8h AND C9h
START 1 0 1 0 0 0 1 0
SLAVE
ACK
11001000
SLAVE
ACK
REPEATED
START
10100011
SLAVE
ACK
DATA IN C8h
MASTER
ACK
DATA IN C9h
MASTER
NACK
STOP
Figure 17. Example I 2 C Timing
______________________________________________________________________________________
25
相关PDF资料 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1873T+ | 功能描述:ADC / DAC多通道 SFP+ Ctrl w/Analog RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| DS1873T+T&R | 制造商:Maxim Integrated Products 功能描述:5X5 TQFN SFP+ CTRL W/ANALOG - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC CTLR SFP+ ANLG LDD 28-TQFN |
| DS1873T+T&R | 功能描述:ADC / DAC多通道 SFP+ Ctrl w/Analog RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| DS1873T+TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:SFP+ Controller with Analog LDD Interface |
| DS1874 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:SFP+ Controller with Digital LDD Interface |
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