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参数资料
| 型号： | DS28E04S-100+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/37页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 4KBIT 16SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 4K (256 x 16) |
| 接口： | 1 线 串行 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
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DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO
Note 19:
Note 20:
Note 21:
Note 22:
Note 23:
Note 24:
ε in Figure 16 represents the time required for the pullup circuitry to pull the voltage on IO up from V IL to V TH . The actual maximum
duration for the master to pull the line low is t W1LMAX + t F - ε and t W0LMAX + t F - ε respectively.
δ in Figure 16 represents the time required for the pullup circuitry to pull the voltage on IO up from V IL to the input high threshold
of the bus master. The actual maximum duration for the master to pull the line low is t RLMAX + t F .
Current drawn during the EEPROM programming interval. If the device does not get V CC power, the pullup circuit on IO during the
programming interval should be such that the voltage at IO is greater than or equal to V PUP (min). If V PUP in the system is close to
Vpup(min) then a low-impedance bypass of R PUP that can be activated during programming may need to be added.
The t PROG interval begins t REHmax after the trailing rising edge on IO for the last time slot of the E/S byte for a valid Copy Scratchpad
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I PROG to I L or I CCS , respectively.
Not production tested. Guaranteed by design or characterization.
EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-time storage at elevated temperatures
is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
PARAMETER
t SLOT (incl. t REC )
t RSTL
t PDH
t PDL
t W0L
LEGACY VALUES
STANDARD SPEED OVERDRIVE SPEED
MIN MAX MIN MAX
61μs (undef) 7μs (undef)
480μs (undef) 48μs 80μs
15μs 60μs 2μs 6μs
60μs 240μs 8μs 24μs
60μs 120μs 6μs 16μs
DS28E04-100 VALUES
STANDARD SPEED OVERDRIVE SPEED
MIN MAX MIN MAX
65μs 1) (undef) 9μs (undef)
504μs 640μs 53μs 80μs
15μs 60μs 2μs 7μs
60μs 240μs 8μs 26μs
60μs 120μs 7μs 16μs
1)
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
PIN DESCRIPTION
PIN NAME
1 A3
2 A2
3 A1
4 A0
5, 12 GND
6, 11 N.C.
7 V CC
8 POL
9 P0
10 P1
13 A6
14 A5
15 A4
16 IO
FUNCTION
Address bit input (place value = 8), with weak pullup.
Address bit input (place value = 4), with weak pullup.
Address bit input (place value = 2), with weak pullup.
Least significant address bit input (place value = 1), with weak pullup.
Ground Reference
Not Connected
Optional power supply for the chip; leave unconnected or ground if V CC power
is not available.
Power-up polarity (logical state) for P0 and P1; pin has a weak pulldown.
Remote-controlled I/O pin, open drain with weak pulldown.
Remote-controlled I/O pin, open drain with weak pulldown.
Address bit input (place value = 64), with weak pullup.
Address bit input (place value = 32), with weak pullup.
Address bit input (place value = 16), with weak pullup.
1-Wire Bus Interface. Open drain, requires external pullup resistor.
DETAILED DESCRIPTION
The DS28E04-100 combines 4096 bits of EEPROM, a 16-byte control page, two general-purpose PIO pins, seven
external address pins, and a fully featured 1-Wire interface in a single chip. PIO outputs are configured as open-
drain and provide an on-resistance of 100 ? max. A robust PIO channel-access communication protocol ensures
that PIO output-setting changes occur error-free. The DS28E04-100 has an additional memory area called the
scratchpad that acts as a buffer when writing to the main memory or the control page. Data is first written to the
scratchpad from which it can be read back. The copy scratchpad command transfers the data to its final memory
location. Each DS28E04-100 has a device ID number that is 64 bits long. The user can define seven bits of this
number through address pins. The remaining 57 bits are factory-lasered into the chip. The device ID number
guarantees unique identification and is used to address the device in a multidrop 1-Wire network environment,
where multiple devices reside on a common 1-Wire bus and operate independently of each other. The DS28E04-
100 also supports 1-Wire conditional search capability based on PIO conditions or power-on-reset activity. The
DS28E04-100 has an optional V CC supply connection. When an external supply is absent, device power is supplied
parasitically from the 1-Wire bus. When an external supply is present, PIO states are maintained in the absence of
the 1-Wire bus power source. Applications of the DS28E04-100 include autoconfiguration and state monitoring of
modular systems such as central-office switches, cellular base stations, access products, optical network units, and
PBXs, and accessory/PC board identification.
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相关代理商/技术参数 |
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| DS28E04S-224-BB+T | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
| DS28E05P+ | 功能描述:电可擦除可编程只读存储器 1W 1KB FTP MEMORY TSOC RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS28E05P+T | 功能描述:电可擦除可编程只读存储器 1W 1KB FTP MEMORY TSOC RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS28E05R+T | 功能描述:电可擦除可编程只读存储器 1-Wire 112-BYTE 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS28E10 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire SHA-1 Authenticator Irreversible Write Protection |
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