参数资料
型号: DS3170N+
厂商: Maxim Integrated Products
文件页数: 213/230页
文件大小: 0K
描述: IC TXRX DS3/E3 100-CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 640
功能: 单芯片收发器
接口: DS3,E3
电路数: 1
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 120mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LBGA,CSBGA
供应商设备封装: 100-CSBGA(11x11)
包装: 托盘
包括: DS3 调帧器,E3 调帧器,HDLC 控制器,芯片内 BERT
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DS3170 DS3/E3 Single-Chip Transceiver
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A Loss Of Frame (LOF) condition is declared by the LOF integration counter when it has been active for a total of T
ms. The LOF integration counter is active (increments count) when an OOF condition is present, it is inactive (holds
count) when an OOF condition is absent, and it is reset when an OOF condition is absent for T continuous ms. T is
programmable (0, 1, 2, or 3). An LOF condition is terminated when an OOF condition is absent for T continuous
ms.
A Change Of Frame Alignment (COFA) is declared when the DS3 framer updates the data path frame counters
with a frame alignment that is different from the current data path DS3 frame alignment.
A Loss Of Signal (LOS) condition is declared when the B3ZS encoder is active, and it declares an LOS condition.
An LOS condition is terminated when the B3ZS encoder is inactive, or it terminates an LOS condition.
An Alarm Indication Signal (AIS) is a DS3 signal with valid F-bits and M-bits. The X-bits (X1 and X2) are set to one,
the P-bits (P1 and P2) are set to zero, all C-bits (CXY) are set to zero, and the payload bits are set to a 1010 pattern
starting with a one immediately after each DS3 overhead bit. An AIS signal is present when a DS3 frame is
received with valid F-bits and M-bits, both X-bits set to one, both P-bits set to zero, all C-bits set to zero, and all but
seven or fewer payload data bits matching the DS3 overhead aligned 1010 pattern. An AIS signal is absent when a
DS3 frame is received that does not meet the aforementioned criteria for an AIS signal being present. The AIS
integration counter declares an AIS condition when it has been active for a total of 10 to 17 DS3 frames. The AIS
integration counter is active (increments count) when an AIS signal is present, it is inactive (holds count) when an
AIS signal is absent, and it is reset when an AIS signal is absent for 10 to 17 consecutive DS3 frames. An AIS
condition is terminated when an AIS signal is absent for 10 to 17 consecutive DS3 frames.
A Receive Unframed All 1’s (RUA1) condition is declared if in each of 4 consecutive 2047 bit windows, five or less
zeros are detected and an OOF condition is continuously present . A RUA1 condition is terminated if in each of 4
consecutive 2047 bit windows, six or more zeros are detected or an OOF condition is continuously absent.
An Idle Signal (Idle) is a DS3 signal with valid F-bits, M-bits, and P-bits (P1 and P2). The X-bits (X1 and X2) are set
to one, C31, C32, and C33 are set to zero, and the payload bits are set to a 1100 pattern starting with 11 immediately
after each overhead bit. In C-bit mode, an Idle signal is present when a DS3 frame is received with valid F-bits, M-
bits, and P-bits, both X-bits set to one, C31, C32, and C33 set to zero, and all but seven or fewer payload data bits
matching the T3 overhead aligned 1100 pattern. In M23 mode, an Idle signal is present when a T3 frame is
received with valid F-bits, M-bits, and P-bits, both X-bits set to one, and all but seven or fewer payload data bits
matching the overhead aligned 1100 pattern. An Idle signal is absent when a DS3 frame is received that does not
meet aforementioned criteria for an Idle signal being present.
The Idle integration counter declares an Idle
condition when it has been active for a total of 10 to 17 DS3 frames. The Idle integration counter is active
(increments count) when an Idle signal is present, it is inactive (holds count) when an Idle signal is absent, and it is
reset when an Idle signal is absent for 10 to 17 consecutive DS3 frames. An Idle condition is terminated when an
Idle signal is absent for 10 to 17 consecutive DS3 frames.
A Remote Defect Indication (RDI) condition (also called a far-end SEF/AIS defect condition) is declared when four
consecutive DS3 frames are received with the X-bits (X1 and X2) set to zero. An RDI condition is terminated when
four consecutive DS3 frames are received with the X-bits set to one.
A DS3 Framing Format Mismatch (DS3FM) condition is declared when the DS3 format programmed (M13, C-bit)
does not match the incoming DS3 signal framing format. A DS3FM condition is terminated when the incoming
DS3 signal framing format is the same format as programmed. Framing errors are determined by comparing F-bits
and M-bits to their expected values. The type of framing errors accumulated is programmable (OOFs, F & M, F, or
M). An OOF error increments the count whenever an OOF condition is first detected . An F & M error increments
the count once for each F-bit or M-bit that does not match its expected value (up to 31 per DS3 frame). An F error
increments the count once for each F-bit that does not match its expected value (up to 28 per DS3 frame). An M
error increments the count once for each M-bit that does not match its expected value (up to 3 per DS3 frame).
P-bit parity errors are determined by calculating the parity of the current DS3 frame (payload bits only), and
comparing the calculated parity to the P-bits (P1 and P2) in the next DS3 frame. If the calculated parity does not
match P1 or P2, a single P-bit parity error is declared.
C-bit parity errors (C-bit format only) are determined by calculating the parity of the current DS3 frame (payload bits
only), and comparing the calculated parity to the C-bits in subframe three (C31, C32, and C33) in the next DS3 frame.
If the calculated parity does not match C31, C32, or C33, a single C-bit parity error is declared.
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