参数资料
型号: EP20K100
厂商: Altera Corporation
英文描述: Programmable Logic Device Family
中文描述: 可编程逻辑器件系列
文件页数: 31/117页
文件大小: 570K
代理商: EP20K100
Altera Corporation
31
APEX 20K Programmable Logic Device Family Data Sheet
Figure 18. Deep Memory Block Implemented with Multiple ESBs
The ESB implements two forms of dual-port memory: read/write clock
mode and input/output clock mode. The ESB can also be used for
bidirectional, dual-port memory applications in which two ports read or
write simultaneously. To implement this type of dual-port memory, two
or four ESBs are used to support two simultaneous reads or writes. This
functionality is shown in
Figure 19
.
Figure 19. APEX 20K ESB Implementing Dual-Port RAM
ESB
ESB
ESB
to System Logic
Address Decoder
Port A
Port B
address_a[]
address_b[]
data_a[]
data_b[]
we_a
we_b
clkena_a
clkena_b
Clock A
Clock B
相关PDF资料
PDF描述
EP20K1000E Programmable Logic Device Family
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