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| 型号： | EV-ADF4153SD1Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADF4153SD1Z |
| 标准包装： | 1 |
| 系列： | * |
Data Sheet
ADF4153
Rev. F | Page 3 of 24
REVISION HISTORY
11/13—Rev. E to Rev. F
Change to ICP Sink/Source Parameter, Table 1 ..............................4
Changes to Ordering Guide...........................................................24
7/12—Rev. D to Rev. E
Updated Outline Dimensions........................................................23
Changes to Ordering Guide...........................................................24
8/10—Rev. C to Rev. D
Changes to Features Section ............................................................1
Changes to Noise Characteristics Parameter, Table 1 ..................5
Changes to Figure 4...........................................................................7
Changes to Ordering Guide...........................................................24
Added Automotive Products Section ...........................................24
10/08—Rev. B to Rev. C
Added Y Version (Throughout)......................................................1
Changes to Ordering Guide...........................................................23
08/05—Rev. A to Rev. B
Changes to Features ..........................................................................1
Changes to Applications...................................................................1
Changes to Specifications.................................................................3
Changes to Absolute Maximum Ratings........................................5
Changes to Figure 7 to Figure 9.......................................................7
Deleted Figure 8 to Figure 10; Renumbered Sequentially ...........8
Deleted Figure 11 and Figure 14; Renumbered Sequentially ......9
Changes to Table 9 ..........................................................................13
Added Initialization Sequence Section ........................................17
Changes to Fastlock with Spurious Optimization Section........18
Inserted Figure 16; Renumbered Sequentially ............................18
Added Spur Mechanisms Section .................................................18
Added Table 11; Renumbered Sequentially.................................18
Added Spur Consistency Section..................................................19
Changes to Phase Resync Section.................................................19
Inserted Figure 17; Renumbered Sequentially ............................19
Deleted Spurious Signals—
Predicting Where They Will Appear Section..............................20
Changes to Figure 19 ......................................................................20
Changes to Figure 20 ......................................................................21
Added Applications Section ..........................................................21
Changes to Figure 22 Caption .......................................................22
Changes to Ordering Guide...........................................................22
1/04—Rev. 0 to Rev. A
Renumbered Figures and Tables ...................................... Universal
Changes to Specifications.................................................................3
Changes to Pin Function Description............................................7
Changes to RF Power-Down Section ...........................................17
Changes to PCB Design Guidelines for Chip Scale
Package Section ...............................................................................21
Updated Outline Dimensions........................................................22
Updated Ordering Guide ...............................................................22
7/03—Revision 0: Initial Version
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