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参数资料
| 型号： | EV-ADF4153SD1Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADF4153SD1Z |
| 标准包装： | 1 |
| 系列： | * |
ADF4153
Data Sheet
Rev. F | Page 4 of 24
SPECIFICATIONS
AVDD = DVDD = SDVDD = 2.7 V to 3.3 V; VP = AVDD to 5.5 V; AGND = DGND = 0 V; TA = TMIN to TMAX, unless otherwise noted;
dBm referred to 50 .
Table 1.
Parameter
B Version1
Y Version2
Unit
Test Conditions/Comments
RF CHARACTERISTICS (3 V)
See Figure 12 for input circuit
RF Input Frequency (RFIN)
0.5/4.0
GHz min/max
B Version: 8 dBm minimum/0 dBm maximum
0.5/4.0
GHz min/max
Y Version: 6.5 dBm minimum/0 dBm maximum
For lower frequencies, ensure slew rate (SR) > 400 V/s
1.0/4.0
GHz min/max
10 dBm/0 dBm minimum/maximum
REFERENCE CHARACTERISTICS
See Figure 11 for input circuit
REFIN Input Frequency
10/250
MHz min/max
For f < 10 MHz, use a dc-coupled, CMOS-compatible
square wave; slew rate > 25 V/s
REFIN Input Sensitivity
0.7/AVDD
V p-p min/max
REFIN Input Capacitance
10
pF max
REFIN Input Current
±100
A max
PHASE DETECTOR
Phase Detector Frequency4
32
MHz max
CHARGE PUMP
ICP Sink/Source
Programmable; see Table 9
High Value
5
mA typ
With RSET = 5.1 kΩ
Low Value
312.5
A typ
Absolute Accuracy
2.5
% typ
With RSET = 5.1 kΩ
RSET Range
1.5/10
kΩ min/max
ICP Three-State Leakage Current
1
4.5
nA typ
Sink and source current
Matching
2
% typ
0.5 V < VCP < VP – 0.5
ICP vs. VCP
2
% typ
0.5 V < VCP < VP – 0.5
ICP vs. Temperature
2
% typ
VCP = VP/2
LOGIC INPUTS
VINH, Input High Voltage
1.4
V min
VINL, Input Low Voltage
0.6
V max
IINH/IINL, Input Current
±1
A max
CIN, Input Capacitance
10
pF max
LOGIC OUTPUTS
VOH, Output High Voltage
1.4
V min
Open-drain 1 kΩ pull-up to 1.8 V
VOL, Output Low Voltage
0.4
V max
IOL = 500 A
POWER SUPPLIES
AVDD
2.7/3.3
V min/V max
DVDD, SDVDD
AVDD
VP
AVDD/5.5
V min/V max
IDD
24
mA max
20 mA typical
Low Power Sleep Mode
1
A typ
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