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参数资料
| 型号： | EVAL-AD5522EBDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/64页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR 14X14MM AD5522 |
| 标准包装： | 1 |
| 主要目的： | 测试与测量，参数测量单元（PMU） |
| 已用 IC / 零件： | AD5522 |
| 已供物品： | 板 |
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Data Sheet
AD5522
Rev. E | Page 17 of 64
Pin No.
Mnemonic
Description
13
GUARDIN2/
DUTGND2
Guard Amplifier Input for Channel 2/DUTGND Input for Channel 2. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN2. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH2. For more information, see
the Device Under Test Ground (DUTGND) section and the Guard Amplifier section.
14
GUARD2
Guard Output Drive for Channel 2.
15
FOH2
Force Output for Internal Current Ranges (Channel 2).
16
EXTMEASIL2
Sense Input (Low Sense) for High Current Range (Channel 2).
17
EXTMEASIH2
Sense Input (High Sense) for High Current Range (Channel 2).
18
CCOMP2
Compensation Capacitor Input for Channel 2. See the Compensation Capacitors section.
19
CFF2
External Capacitor for Channel 2. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
21
EXTFOH2
Force Output for High Current Range (Channel 2). Use an external resistor at this pin for current ranges up to
±80 mA. For more information, see the Current Range Selection section.
22, 39, 62,
67, 79
AVSS
Negative Analog Supply Voltage.
23
BUSY
Digital Input/Open-Drain Output. This pin indicates the status of the interface. See the BUSY and LOAD
Functions section for more information.
24
SCLK
Serial Clock Input, Active Falling Edge. Data is clocked into the shift register on the falling edge of SCLK. This
pin operates at clock speeds up to 50 MHz.
25
CPOL0/SCLK
Comparator Output Low (Channel 0) for SPI Interface/Differential Serial Clock Input (Complement) for LVDS
Interface.
26
CPOH0/SDI
Comparator Output High (Channel 0) for SPI Interface/Differential Serial Data Input (Complement) for LVDS
Interface.
27
SDI
Serial Data Input for SPI or LVDS Interface.
28
SYNC
Active Low Frame Synchronization Input for SPI or LVDS Interface.
29
CPOL1/SYNC
Comparator Output Low (Channel 1) for SPI Interface/Differential SYNC Input for LVDS Interface.
30
DGND
Digital Ground Reference Point.
31
CPOH1/SDO
Comparator Output High (Channel 1) for SPI Interface/Differential Serial Data Output (Complement) for LVDS
Interface.
32
SDO
Serial Data Output for SPI or LVDS Interface. This pin can be used for data readback and diagnostic purposes.
33
LOAD
Logic Input (Active Low). This pin synchronizes updates within one device or across a group of devices. If
synchronization is not required, LOAD can be tied low; in this case, DAC channels and PMU modes are updated
immediately after BUSY goes high. See the BUSY and LOAD Functions section for more information.
34
DVCC
Digital Supply Voltage.
35
CPOL2/CPO0
Comparator Output Low (Channel 2) for SPI Interface/Comparator Output Window (Channel 0) for LVDS
Interface.
36
CPOH2/CPO1
Comparator Output High (Channel 2) for SPI Interface/Comparator Output Window (Channel 1) for LVDS
Interface.
37
CPOL3/CPO2
Comparator Output Low (Channel 3) for SPI Interface/Comparator Output Window (Channel 2) for LVDS
Interface.
38
CPOH3/CPO3
Comparator Output High (Channel 3) for SPI Interface/Comparator Output Window (Channel 3) for LVDS
Interface.
40
EXTFOH3
Force Output for High Current Range (Channel 3). Use an external resistor at this pin for current ranges up to
±80 mA. For more information, see the Current Range Selection section.
42
CFF3
External Capacitor for Channel 3. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
43
CCOMP3
Compensation Capacitor Input for Channel 3. See the Compensation Capacitors section.
44
EXTMEASIH3
Sense Input (High Sense) for High Current Range (Channel 3).
45
EXTMEASIL3
Sense Input (Low Sense) for High Current Range (Channel 3).
46
FOH3
Force Output for Internal Current Ranges (Channel 3).
47
GUARD3
Guard Output Drive for Channel 3.
48
GUARDIN3/
DUTGND3
Guard Amplifier Input for Channel 3/DUTGND Input for Channel 3. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN3. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH3. For more information, see
the Device Under Test Ground (DUTGND) section and the Guard Amplifier section.
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