参数资料
型号: FDD5353
厂商: Fairchild Semiconductor
文件页数: 2/6页
文件大小: 0K
描述: MOSFET N-CH 60V 11.5A DPAK
产品目录绘图: DPAK, TO-252(AA)
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 60V
电流 - 连续漏极(Id) @ 25° C: 11.5A
开态Rds(最大)@ Id, Vgs @ 25° C: 12.3 毫欧 @ 10.7A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 65nC @ 10V
输入电容 (Ciss) @ Vds: 3215pF @ 30V
功率 - 最大: 3.1W
安装类型: 表面贴装
封装/外壳: TO-252-3,DPak(2 引线+接片),SC-63
供应商设备封装: TO-252
包装: 标准包装
产品目录页面: 1606 (CN2011-ZH PDF)
其它名称: FDD5353DKR
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V GS = 0V, V DS = 48V,
V GS = ±20V, V DS = 0V
60
77
1
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
1.0
1.8
-8
3.0
V
mV/°C
V GS = 10V, I D = 10.7A
10.1
12.3
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5V, I D = 9.5A
12.1
15.4
m Ω
V GS = 10V, I D = 10.7A, T J = 125°C
16.7
20.3
g FS
Forward Transconductance
V DD = 5V, I D = 10.7A
41
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 30V, V GS = 0V,
f = 1MHz
f = 1MHz
2420
215
120
1.7
3215
285
180
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
11
20
ns
t r
t d(off)
t f
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 30V, I D = 10.7A,
V GS = 10V, R GEN = 6 Ω
6
36
4
11
58
10
ns
ns
ns
Q g
Q g
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0V to 10V
V GS = 0V to 4.5V
V DD = 30V,
I D = 10.7A
46
23
7
65
32
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
9
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 10.7A
V GS = 0V, I S = 2.6A
(Note 2)
(Note 2)
0.8
0.7
1.3
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 10.7A, di/dt = 100A/ μ s
28
21
45
34
ns
nC
Notes :
1: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ JA is determined by the user’s board design.
a) 40°C/W when mounted on a
1 in 2 pad of 2 oz copper
b) 96°C/W when mounted
on a minimum pad.
2: Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
3: E AS of 253mJ is based on starting T J = 25 ° C, L = 3mH, I AS = 13A, V DD = 60V, V GS = 10V. 100% test at L = 0.1mH, I AS = 41A.
?2013 Fairchild Semiconductor Corporation
FDD5353 Rev.C1
2
www.fairchildsemi.com
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