参数资料
型号: FDG8850NZ
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET DUAL N-CH 30V SC70-6
产品变化通告: Mold Compound Change 12/Dec/2007
产品目录绘图: MOSFET SC70-6 Pkg
标准包装: 1
系列: PowerTrench®
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 750mA
开态Rds(最大)@ Id, Vgs @ 25° C: 400 毫欧 @ 750mA,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 1.44nC @ 4.5V
输入电容 (Ciss) @ Vds: 120pF @ 10V
功率 - 最大: 300mW
安装类型: 表面贴装
封装/外壳: 6-TSSOP,SC-88,SOT-363
供应商设备封装: SC-70-6
包装: 标准包装
产品目录页面: 1608 (CN2011-ZH PDF)
其它名称: FDG8850NZDKR
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V DS = 24V, V GS = 0V
V GS = ±12V, V DS = 0V
30
25
1
±10
V
mV/° C
μ A
μ A
On Characteristics
V GS(th)
Δ V GS(t h)
Δ T J
r DS(on)
g FS
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
V GS = 4.5V, I D = 0.75A
V GS = 2.7V, I D = 0.67A
V GS = 4.5V, I D = 0.75A ,T J = 125°C
V DS = 5V, I D = 0.75A
0.65
1.0
–3.0
0.25
0.29
0.36
3
1.5
0.4
0.5
0.6
V
mV/°C
Ω
S
Dynamic Characteristics
C iss
Input Capacitance
90
120
pF
C oss
C rss
Output Capacitance
Reverse Transfer Capacitance
V DS = 10V, V GS = 0V, f= 1MHZ
20
15
30
25
pF
pF
Switching Characteristics (note 2)
t d(on)
Turn-On Delay Time
4
10
ns
t r
t d(off)
t f
Q g
Q gs
Q gd
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V DD = 5V, I D = 0.5A,
V GS = 4.5V,R GEN = 6 Ω
V GS =4.5V, V DD = 5V, I D = 0.75A
1
9
1
1.03
0.29
0.17
10
18
10
1.44
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain-Source Diode Forward Current
0.3
A
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 0.3A
(Note 2)
0.76
1.2
V
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ JA is determined by the user's board design.
a. 350°C/W when mounted on a
1 in 2 pad of 2 oz copper .
Scale 1:1 on letter size paper.
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
b. 415°C/W when mounted on a minimum pad
of 2 oz copper.
?2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
2
www.fairchildsemi.com
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