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| 型号： | FDMC2523P |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET P-CH 150V 3A MLP 3.3SQ |
| 产品培训模块： | High Voltage Switches for Power Processing |
| 产品变化通告： | Mold Compound Change 17/March/2008 |
| 产品目录绘图： | 8-MLP, Power33, 56 Dual |
| 标准包装： | 1 |
| 系列： | QFET™ |
| FET 型： | MOSFET P 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 150V |
| 电流 - 连续漏极(Id) @ 25° C： | 3A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 1.5 欧姆 @ 1.5A，10V |
| Id 时的 Vgs(th)（最大）： | 5V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 9nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 270pF @ 25V |
| 功率 - 最大： | 42W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-PowerVDFN |
| 供应商设备封装： | 8-Power33（3x3） |
| 包装： | 标准包装 |
| 产品目录页面： | 1609 (CN2011-ZH PDF) |
| 其它名称： | FDMC2523PDKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = -250 μ A, V GS = 0V
I D = -250 μ A, referenced to 25°C
V DS = -150V, V GS = 0V
T J = 125°C
V GS = ±30V, V DS = 0V
-150
-138
-1
-10
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th )
Δ T J
r DS(on)
g FS
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
V GS = V DS , I D = -250 μ A
I D = -250 μ A, referenced to 25°C
V GS = -10V, I D = -1.5A
V GS = -10V, I D = -1.5A , T J = 125°C
V DS = -40V, I D = -1.5A (Note 4)
-3
-3.8
6
1.1
2.0
1.4
-5
1.5
3.6
V
mV/°C
Ω
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = -25V, V GS = 0V,
f = 1MHz
f = 1MHz
0.1
200
60
10
7.5
270
80
15
15
pF
pF
pF
Ω
Switching Characteristics
t d(on)
t r
t d(off)
t f
Q g
Q gs
Q gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V DD = -75V, I D = -3A
V GS = -10V, R GEN = 25 Ω
V GS = -10V
V DD = -75V
I D = -3A
(Note 3,4)
(Note 3,4)
15
11
19
13
6.2
1.4
3.3
27
20
35
24
9
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
I F = -3.0A, di/dt = 100A/ μ s
I S
I SM
V SD
t rr
Q rr
Maximum continuous Drain - Source Diode Forward Current
Maximum Pulse Drain - Source Doide Forward Current
Source to Drain Diode Forward Voltage V GS = 0V, I S = -3.0A
Reverse Recovery Time
Reverse Recovery Charge
(Note 3)
-1.8
93
0.27
-3
-12
-5
A
A
V
ns
nC
Notes:
1: R θ JA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a. 60°C/W when mounted on
a 1 in 2 pad of 2 oz copper
b.135°C/W when mounted on a
minimum pad of 2 oz copper
2:
3:
4:
5:
I SD < -3A, dI/dt < 300A/us, V DD < B VDSS , Starting T J = 25°C
Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
Essentially independent of operating temperature.
E AS of 3.3 mJ is based on starting T J = 25 ° C; P-ch: L = 3 mH, I AS = -1.5 A, V DD = -150 V, V GS = -10 V.
FDMC2523P Rev.C5
2
www.fairchildsemi.com
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相关代理商/技术参数 |
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