参数资料
型号: FDML7610S
厂商: Fairchild Semiconductor
文件页数: 5/15页
文件大小: 0K
描述: MOSFET N-CH 30V DUAL 8-MLP
标准包装: 1
系列: PowerTrench®
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 12A,17A
开态Rds(最大)@ Id, Vgs @ 25° C: 7.5 毫欧 @ 12A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 28nC @ 10V
输入电容 (Ciss) @ Vds: 1750pF @ 15V
功率 - 最大: 800mW,900mW
安装类型: 表面贴装
封装/外壳: 8-MLP
供应商设备封装: 8-MLP(3x4.5)
包装: 标准包装
其它名称: FDML7610SDKR
Typical Characteristics (Q1 N-Channel) T J = 25 °C unless otherwise noted
10
I D = 12 A
2000
8
6
V DD = 10 V
V DD = 15 V
1000
C iss
C oss
4
2
V DD = 20 V
100
f = 1 MHz
C rss
0
0
5
10
15
20
V GS = 0 V
10
0.1
1
10
30
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
60
100
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
R θ JC = 4 C/W
40
V GS = 4.5 V
V GS = 10 V
o
10
100us
1 ms
1
THIS AREA IS
10 ms
20
Limited by Package
0.1
LIMITED BY rDS ( on )
SINGLE PULSE
T J = MAX RATED
R θ JA = 150 o C/W
T A = 25 o C
100 ms
1s
10s
DC
0
0.01
25
50
75
100
125
150
0.01
0.1
1
10
100 200
T C , CASE TEMPERATURE ( C )
o
Figure 9. Maximum Continuous Drain Current vs
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe Operating Area
R θ JA = 150 C/W
Case Temperature
1000
SINGLE PULSE
o
T A = 25 C
100
10
1
0.5
o
10
10
10
10
-4
-3
-2
-1
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
?2013 Fairchild Semiconductor Corporation
FDML7610S Rev.C1
5
www.fairchildsemi.com
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