参数资料
型号: FDN306P
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET P-CH 12V 2.6A SSOT3
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Wire Bonding Change 07/Nov/2008
Mold Compound Change 08/April/2008
产品目录绘图: SuperSOT-3, SOT-23
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 12V
电流 - 连续漏极(Id) @ 25° C: 2.6A
开态Rds(最大)@ Id, Vgs @ 25° C: 40 毫欧 @ 2.6A,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 17nC @ 4.5V
输入电容 (Ciss) @ Vds: 1138pF @ 6V
功率 - 最大: 460mW
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: 3-SSOT
包装: 标准包装
产品目录页面: 1602 (CN2011-ZH PDF)
其它名称: FDN306PDKR
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
V GS = 0 V,
I D = –250 μ A
–12
V
? BV DSS
? T J
I DSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
I D = –250 μ A,Referenced to 25 ° C
V DS = –10 V, V GS = 0 V
–3
–1
mV/ ° C
μ A
I GSSF
I GSSR
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V GS = 8 V,
V GS = –8 V,
V DS = 0 V
V DS = 0 V
100
–100
nA
nA
On Characteristics
(Note 2)
V GS(th)
Gate Threshold Voltage
V DS = V GS ,
I D = –250 μ A
–0.4
–0.6
–1.5
V
? V GS(th)
? T J
R DS(on)
I D(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
I D = –250 μ A,Referenced to 25 ° C
V GS = –4.5 V, I D = –2.6 A
V GS = –2.5 V, I D = –2.3 A
V GS = –1.8V, I D = –1.8 A
V GS = –4.5 V, I D = –2.6A , T J =125 ° C
V GS = –4.5 V, V DS = –5 V
–10
2.5
30
39
54
40
40
50
80
54
mV/ ° C
m ?
A
g FS
Forward Transconductance
V DS = –5 V,
I D = –2.6 A
10
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = –6 V,
f = 1.0 MHz
V GS = 0 V,
1138
454
302
pF
pF
pF
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = –6 V,
V GS = –4.5 V,
V DS = –6 V,
V GS = –4.5 V
I D = –1 A,
R GEN = 6 ?
I D = –2.6 A,
11
10
38
35
12
2
20
20
61
56
17
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
3
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Sourc e Diode Forward Current
–0.42
A
V SD
Drain–Source Diode Forward
Voltage
V GS = 0 V,
I S = –0.42
(Note 2)
–0.6
–1.2
V
Notes:
1.
R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a) 250 ° C/W when mounted on a
0.02 in 2 pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
b) 270°C/W when mounted on a
minimum pad.
2.
Pulse Test: Pulse Width ≤ 300 μ s, Duty Cycle ≤ 2.0%
FDN306P Rev D W)
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