参数资料
型号: FDS6984AS
厂商: Fairchild Semiconductor
文件页数: 3/9页
文件大小: 0K
描述: MOSFET 2N-CH 30V 5.5A/8.5A 8SOIC
产品变化通告: Mold Compound Change 12/Dec/2007
标准包装: 1
系列: PowerTrench®, SyncFET™
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 5.5A,8.5A
开态Rds(最大)@ Id, Vgs @ 25° C: 31 毫欧 @ 5.5A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 11nC @ 10V
输入电容 (Ciss) @ Vds: 420pF @ 15V
功率 - 最大: 900mW
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 标准包装
其它名称: FDS6984ASFSDKR
Electrical Characteristics
(continued)
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Switching Characteristics
(Note 2)
t d(on)
Turn-On Delay Time
Q2
8
16
ns
Q1
9
18
t r
t d(off)
t f
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V DD = 15 V, I D = 1 A,
V GS = 10V, R GEN = 6 ?
Q2
Q1
Q2
Q1
Q2
5
6
23
22
4
10
12
37
35
8
ns
ns
ns
Q1
2
4
t d(on)
Turn-On Delay Time
Q2
9
18
ns
Q1
10
19
t r
t d(off)
t f
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V DD = 15 V, I D = 1 A,
V GS = 4.5V, R GEN = 6 ?
Q2
Q1
Q2
Q1
Q2
7
11
13
13
4
14
20
24
24
8
ns
ns
ns
Q1
3
6
Q g(TOT)
Total Gate Charge, Vgs = 10V
Q2
10
14
nC
Q g
Q gs
Q gd
Total Gate Charge, Vgs = 5V
Gate-Source Charge
Gate-Drain Charge
Q2:
V DS = 15 V, I D = 8.5 A
Q1:
V DS = 15 V, I D = 5.5 A
Q1
Q2
Q1
Q2
Q1
Q2
8
5
4
1.5
1.3
1.9
11
8
6
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
Q1
1.5
I S
Maximum Continuous Drain-Source Diode Forward Current
Q2
3.0
A
Q1
1.3
t rr
Q rr
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
I F = 10A,
dI F /dt = 300 A/μs
I F = 5.5A,
dI F /dt = 100 A/μs
(Note 3)
(Note 3)
Q2
Q1
13
6
17
6
ns
nC
ns
nC
V SD
Drain-Source Diode Forward
Voltage
V GS = 0 V, I S = 2.3 A
V GS = 0 V, I S = 1.3 A
(Note 2)
(Note 2)
Q2
Q1
0.6
0.8
0.7
1.2
V
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a)
78°C/W when
b)
125°C/W when
c)
135°C/W when
mounted on a
0.5in 2 pad of 2
oz copper
mounted on a
0.02 in 2 pad of
2 oz copper
mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. See “SyncFET Schottky body diode characteristics” below.
3. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%
 
FDS6984AS Rev A 1 (X)
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