参数资料
| 型号： | HW-USB-II-G |
| 厂商： | Xilinx Inc |
| 文件页数： | 22/35页 |
| 文件大小： | 0K |
| 描述： | PLATFORM CABLE USB II |
| 产品培训模块： | Extended Spartan 3A FPGA Family S6 Family Overview |
| 标准包装： | 1 |
| 附件类型： | USB 平台线缆 |
| 适用于相关产品： | Xilinx FPGA、CPLDS、平台闪存 PROM、XC18V00 PROM、系统 ACE MPM |
| 产品目录页面： | 600 (CN2011-ZH PDF) |
| 其它名称： | 122-1572 |
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Platform Cable USB II
Pseudo Ground Signal
The pseudo ground (PGND) pin on target interface connector is routed to a ultra-high-speed buffer with an open-drain output
( Figure 23 ). A pull-up resistor is required on target systems that utilize this signal. The buffer can tolerate a pull-up voltage
as high as 6.0V.
X-Ref Target - Figure 23
FPGA
NC7WZ07
2-mm Connector
PGND_CNTL
A
Y
PGND
Input
A
H
L
Output
Y
Z
L
DS593_23_021508
Figure 23: PGND Signal
HALT_INIT_WP Signal in iMPACT
Platform Cable USB II provides a second multi-use signal on its target interface connector called HALT_INIT_WP (this signal
is referred to as HALT when the cable is in JTAG mode). The HALT_INIT_WP pin is connected to a three-state CMOS driver
(see Bidirectional Signal Pins, page 19 ).
The behavior of HALT_INIT_WP is determined by the host application connected to the cable. iMPACT provides the option
of enabling the HALT pin during JTAG operations ( Figure 24 ). This option is accessed by clicking on the Xilinx FPGA in the
iMPACT GUI and selecting Edit → Set Programming Properties… to open the Device Programming Properties dialog box.
Check “Assert Cable INIT during programming” to enable the HALT signal.
When enabled in iMPACT, HALT is active-Low while the cable is performing JTAG operations on any Xilinx FPGA and high-
Z when the cable is idle. HALT is active-High while JTAG operations are being performed on other devices. The HALT signal
remains high-Z when not enabled (iMPACT default) or when the cable is in Slave Serial or SPI modes.
Note: HALT signal control is available in iMPACT 9.2i and later. HALT remains high-Z in earlier versions of iMPACT and in Xilinx design
tools where the HALT signal is not supported.
DS593 (v1.2.1) March 17, 2011
22
相关PDF资料 |
PDF描述 |
|---|---|
| HW-USBN-2A | ACCY USB DOWNLOAD CABLE STD SPD |
| HW-V4-ML401-USA | EVALUATION PLATFORM VIRTEX-4 |
| HW-V4-ML423-UNI-G | EVALUATION PLATFORM VIRTEX-4 |
| HW-V4SX35-VIDEO-SK-UK | VIRTEX-4 VIDEO STARTER KIT |
| HW-V5-ML521-UNI-G | EVALUATION PLATFORM VIRTEX-5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HW-USBN-2A | 功能描述:程序设计器配件 ispDOWNLOAD Cable RoHS:否 制造商:Lattice 产品:ispDOWNLOAD Cables 用于:In-system Programming |
| HW-USBN-2B | 功能描述:Lattice Programmable Products ispDOWNLOAD? In-System Programmer 制造商:lattice semiconductor corporation 系列:ispDOWNLOAD? 零件状态:有效 类型:系统内编程器 配套使用产品/相关产品:Lattice 可编程产品 内容:编程器 标准包装:1 |
| HW-UW 30 | 制造商:OK International (OKI) / Metcal 功能描述:WRAPPING AND UNWRAPPING TOOL HAND 制造商:OK International (OKI) / Metcal 功能描述:WRAPPING AND UNWRAPPING TOOL, HAND |
| HW-UW-18-19 | 功能描述:手工工具 WRAP-UNWRAP TOOL, 18-19 AWG RoHS:否 制造商:Molex 产品:Extraction Tools 类型: 描述/功能:Extraction tool |
| HW-UW18-19 | 制造商:Jonard Industries 功能描述:WRAP-UNWRAP TOOL, 18-19 AWG |
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