参数资料
| 型号： | HW-USB-II-G |
| 厂商： | Xilinx Inc |
| 文件页数： | 27/35页 |
| 文件大小： | 0K |
| 描述： | PLATFORM CABLE USB II |
| 产品培训模块： | Extended Spartan 3A FPGA Family S6 Family Overview |
| 标准包装： | 1 |
| 附件类型： | USB 平台线缆 |
| 适用于相关产品： | Xilinx FPGA、CPLDS、平台闪存 PROM、XC18V00 PROM、系统 ACE MPM |
| 产品目录页面： | 600 (CN2011-ZH PDF) |
| 其它名称： | 122-1572 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页当前第27页第28页第29页第30页第31页第32页第33页第34页第35页
Platform Cable USB II
X-Ref Target - Figure 28
Propagation delay from A to B (26 ns) captured directly at
the target represents 70% of the total propagation delay
seen by the cable (Figure 25).
TDO Sampling Point
TCK
TDO
TDO Sampling Point
DS593_28_021408
Figure 28: TDO Sampling Example at 12 MHz (Analog Signals on Target System)
Signal Integrity
Platform Cable USB II uses high-slew-rate buffers to drive its output pins. Each buffer has a 30.1 Ω series termination
resistor. Users should pay close attention to PCB layout to avoid transmission line effects. Visit the Xilinx Signal Integrity
Central website, and see XAPP361 , Planning for High Speed XC9500XV Designs for detailed signal integrity assistance.
If the target system has only one programmable device, the 2-mm connector should be located as close as possible to the
target device. If there are multiple devices in a JTAG or slave-serial single chain on the target system, users should consider
buffering TCK_CCLK_SCK. Differential driver/receiver pairs provide excellent signal quality when the rules identified in
Figure 29 are followed. Buffering is essential if target devices are distributed over a large PCB area.
X-Ref Target - Figure 29
Route A & B traces for each differential
SN65LVDS105
Four Differential
pair in parallel with equal length and
consistent spacing
Drivers
SN65LVDS2 (2)
Series Termination Resistor
(20 Ω ?30 Ω )
TCK_CCLK_SCK
1
TCK_CCLK_SCK1
Four
Buffered
4
TCK_CCLK_SCK4
Clocks
Locate one receiver adacent
to each target device
Locate driver package adjacent to 2-mm connector
DS593_29_021408
Figure 29: Differential Clock Buffer Example
Each differential driver and/or receiver pair contributes approximately 5 ns of propagation delay. This delay is insignificant
when using 12 MHz or slower clock speeds.
DS593 (v1.2.1) March 17, 2011
27
相关PDF资料 |
PDF描述 |
|---|---|
| HW-USBN-2A | ACCY USB DOWNLOAD CABLE STD SPD |
| HW-V4-ML401-USA | EVALUATION PLATFORM VIRTEX-4 |
| HW-V4-ML423-UNI-G | EVALUATION PLATFORM VIRTEX-4 |
| HW-V4SX35-VIDEO-SK-UK | VIRTEX-4 VIDEO STARTER KIT |
| HW-V5-ML521-UNI-G | EVALUATION PLATFORM VIRTEX-5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HW-USBN-2A | 功能描述:程序设计器配件 ispDOWNLOAD Cable RoHS:否 制造商:Lattice 产品:ispDOWNLOAD Cables 用于:In-system Programming |
| HW-USBN-2B | 功能描述:Lattice Programmable Products ispDOWNLOAD? In-System Programmer 制造商:lattice semiconductor corporation 系列:ispDOWNLOAD? 零件状态:有效 类型:系统内编程器 配套使用产品/相关产品:Lattice 可编程产品 内容:编程器 标准包装:1 |
| HW-UW 30 | 制造商:OK International (OKI) / Metcal 功能描述:WRAPPING AND UNWRAPPING TOOL HAND 制造商:OK International (OKI) / Metcal 功能描述:WRAPPING AND UNWRAPPING TOOL, HAND |
| HW-UW-18-19 | 功能描述:手工工具 WRAP-UNWRAP TOOL, 18-19 AWG RoHS:否 制造商:Molex 产品:Extraction Tools 类型: 描述/功能:Extraction tool |
| HW-UW18-19 | 制造商:Jonard Industries 功能描述:WRAP-UNWRAP TOOL, 18-19 AWG |
发布紧急采购，3分钟左右您将得到回复。