参数资料
型号: HW-USB-II-G
厂商: Xilinx Inc
文件页数: 28/35页
文件大小: 0K
描述: PLATFORM CABLE USB II
产品培训模块: Extended Spartan 3A FPGA Family
S6 Family Overview
标准包装: 1
附件类型: USB 平台线缆
适用于相关产品: Xilinx FPGA、CPLDS、平台闪存 PROM、XC18V00 PROM、系统 ACE MPM
产品目录页面: 600 (CN2011-ZH PDF)
其它名称: 122-1572
Platform Cable USB II
Each differential receiver can drive multiple target devices if there are no branches on the PCB trace and the total trace
length is less than four inches. A series termination resistor should be placed adjacent to the single-ended output of the
differential receiver.
Note: If the target chain has, for example, a JTAG or Slave Serial topology and a 24 MHz clock rate is desired, it is recommended that
matching buffers be used for both TCK_CCLK_SCK and TMS_PROG_SS. Matching buffers maintains a consistent phase relationship
between TCK_CCLK_SCK and TMS_PROG_SS. A buffer is not needed for TDI_DIN_MOSI, because it sees only one load.
USB Hub Types and Cable Performance
There are two important hub specifications affecting the performance of Platform Cable USB II: maximum port current and
total bandwidth.
Maximum Port Current
Platform Cable USB II is a bus-powered device, drawing less than 150 mA from the host USB port under all operating
conditions.
Note: Some older USB root hubs or external bus-powered hubs might restrict peripherals to 100 mA. Platform Cable USB II cannot
enumerate on hubs with the 100 mA restriction.
Total Bandwidth
The maximum theoretical bandwidth is 480 Mb/s for a single USB 2.0 Hi-Speed device and 12 Mb/s for a single USB 1.1 full-
speed device. However, because hub bandwidth must be shared among all connected devices, actual bandwidth is in
practice lower than these theoretical values.
Platform Cable USB II performance is optimal when enumerated on a USB 2.0 Hi-Speed port. Hi-Speed USB operation is
guaranteed only if the cable is attached directly to a USB 2.0 root hub ( Figure 30E ), or to an external, self-powered USB 2.0
hub connected directly to a USB 2.0 root hub ( Figure 30D ).
If Platform Cable USB II is attached to a USB 1.1 root hub ( Figure 30A ) or to USB 2.0 external hub connected to a USB 1.1
root hub ( Figure 30B ), the cable enumerates as a full-speed device and cable performance is degraded. Communication
and protocol overhead limits any given USB device to approximately 30% of total bandwidth. For USB 1.1 hubs, the
maximum achievable throughput is approximately 3.6 Mb/s.
Certain self-powered, USB 2.0 hubs can continue to function as USB 1.1 hubs when disconnected from their external power
source ( Figure 30C). When no external power source is present, these hubs draw their power from their upstream USB port.
If Platform Cable USB II is connected to such a hub while operating at USB 1.1 speeds, the cable enumerates as a full-
speed device. Furthermore, bus-powered hubs can only deliver a total of 500 mA to all connected devices. If individual ports
on bus-powered hubs are limited to less than 150 mA, Platform Cable USB II does not enumerate and is unavailable for use
by host software applications.
DS593 (v1.2.1) March 17, 2011
28
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