参数资料
型号: IMSH2GU13A1F1C-08D
厂商: QIMONDA AG
元件分类: DRAM
英文描述: 256M X 64 DDR DRAM MODULE, DMA240
封装: GREEN, UDIMM-240
文件页数: 25/49页
文件大小: 986K
代理商: IMSH2GU13A1F1C-08D
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
Advance Internet Data Sheet
Rev. 0.63, 2008-08
31
03052008-R2G5-2FN2
TABLE 19
SPD Codes for IMSH2GU13A1F1C
Product Type
IMSH2GU13A
1F1
C
–13
G
IMSH2GU13A
1F1
C
–13
H
IMSH2GU13A
1F1
C
–16
J
Organization
2 GByte
×64
2 Ranks (
×8)
2 Ranks (
×8)
2 Ranks (
×8)
Label Code
PC3–10600U–8
PC3–10600U–9
PC3–12800U–11
JEDEC SPD Revision
Rev. 1.0
Byte#
Description
HEX
0
# of SPD bytes utilized / # of bytes in SPD / CRC
92
1
SPD Revision
10
2
SDRAM technology key byte
0B
3
DIMM module type
02
4
SDRAM density and banks
02
5
SDRAM addressing
11
6
Module physical attributes
00
7
Module organization
09
8
Module memory bus width
03
9
Fine time base (FTB) dividend and divisor
52
10
Medium time base (MTB) dividend
01
11
Medium time base (MTB) divisor
08
12
Minimum SDRAM cycle time (
t
CK.MIN)0C
0C
0A
13
Reserved
00
14
CAS Latencies Supported - LSB
7E
7C
7E
15
CAS Latencies Supported - MSB
00
16
Minimum CAS Latency Time
(t
CK.MIN)60
69
64
17
Minimum Write Recovery Time
(t
WR.MIN)78
78
18
Minimum RAS# toCAS# Delay Time
(t
RCD.MIN)60
69
64
19
Minimum Row Active to Row Active Delay Time
(t
RRD.MIN)
30
20
Minimum Row PrechargeTime
(t
RP.MIN)60
69
64
21
Upper Nibbles fo
r t
RAS and tRC
11
22
Minimum Active to Precharge Time
(t
RAS.MIN), LSB
20
18
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