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参数资料
| 型号： | IMSH2GU13A1F1C-08D |
| 厂商： | QIMONDA AG |
| 元件分类： | DRAM |
| 英文描述： | 256M X 64 DDR DRAM MODULE, DMA240 |
| 封装： | GREEN, UDIMM-240 |
| 文件页数： | 9/49页 |
| 文件大小： | 986K |
| 代理商： | IMSH2GU13A1F1C-08D |
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IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
Advance Internet Data Sheet
Rev. 0.63, 2008-08
17
03052008-R2G5-2FN2
TABLE 13
DDR3-1066 Speed Bins and Operating Conditions
Average Clock Period with CL = 5; CWL = 5
t
CK.AVG.CL05.CWL05
2.5
3.3
RESERVED
ns
1)2)
Average Clock Period with CL = 6; CWL = 5
t
CK.AVG.CL06.CWL05
2.5
3.3
2.5
3.3
ns
1) Please refer to "General Notes for Speed Bins" at beginning of this chapter.
2) Max. limits are exclusive. E.g. if
t
CK.AVG.MAX value is 2.5 ns, tCK.AVG needs to be < 2.5 ns.
Speed Bin
DDR3-1066E
DDR3-1066F
DDR3-1066G
Unit
Note
CL-
n
RCD-nRP
6-6-6
7-7-7
8-8-8
QAG Partnumber Extension
-10E
-10F
-10G
Parameter
Symbol
Min.
Max.
Min.
Max.
Min.
Max.
Internal read command to first data
t
AA
11.25
20.0
13.125 20.0
15.0
20.0
ns
1)
1) Please refer to "General Notes for Speed Bins" at beginning of this chapter.
ACT to internal read or write delay
time
t
RCD
11.25
—
13.125 —
15.0
—
ns
PRE command period
t
RP
11.25
—
13.125 —
15.0
—
ns
ACT to ACT or REF command
period
t
RC
48.75
—
50.625 —
52.5
—
ns
Supported CL Settings
Sup_CL
5, 6, 7, 8
6, 7, 8
6, 8
n
CK
Supported CWL Settings
Sup_CWL
5, 6
n
CK
Average Clock Period with CL = 5;
CWL = 5
t
CK.AVG.CL05.CWL05
2.5
3.3
RESERVED
ns
1)2)
2) Max. limits are exclusive. E.g. if
t
CK.AVG.MAX value is 2.5 ns, tCK.AVG needs to be < 2.5 ns.
Average Clock Period with CL = 5;
CWL = 6
t
CK.AVG.CL05.CWL06
RESERVED
ns
Average Clock Period with CL = 6;
CWL = 5
t
CK.AVG.CL06.CWL05
2.5
3.3
2.5
3.3
2.5
3.3
ns
Average Clock Period with CL = 6;
CWL = 6
t
CK.AVG.CL06.CWL06
1.875
2.5
RESERVED
ns
Average Clock Period with CL = 7;
CWL = 5
t
CK.AVG.CL07.CWL05
RESERVED
ns
Average Clock Period with CL = 7;
CWL = 6
t
CK.AVG.CL07.CWL06
1.875
2.5
1.875
2.5
RESERVED
ns
Average Clock Period with CL = 8;
CWL = 5
t
CK.AVG.CL08.CWL05
RESERVED
ns
Average Clock Period with CL = 8;
CWL = 6
t
CK.AVG.CL08.CWL06
1.875
2.5
1.875
2.5
1.875
2.5
ns
Speed Bin
DDR3-800D
DDR3-800E
Unit
Note
CL-
n
RCD-nRP
5-5-5
6-6-6
QAG Partnumber Extension
-08D
-08E
Parameter
Symbol
Min.
Max.
Min.
Max.
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