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1058
SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
These parameters are different for the different configurations of the LCD Controller and are shown in
Table 45-4.
45.6.2.3
FIFO
The FIFO block buffers the input data read by the DMA module. It contains two input FIFOs to be used in Dual
Scan configuration that are configured as a single FIFO when used in single scan configuration.
The size of the FIFOs allows a wide range of architectures to be supported.
The upper threshold of the FIFOs can be configured in the FIFOTH field of the LCDFIFO register. The LCDC core
will request a DMA transfer when the number of words in each FIFO is less than FIFOTH words. To avoid overwrit-
ing in the FIFO and to maximize the FIFO utilization, the FIFOTH should be programmed with:
FIFOTH (in Words) = 512 - (2 x DMA_BURST_LENGTH + 3)
where:
512 is the effective size of the FIFO in Words. It is the total FIFO memory size in single scan mode and half that
size in dual scan mode.
DMA_burst_length is the burst length of the transfers made by the DMA in Words.
45.6.2.4
Serializer
This block serializes the data read from memory. It reads words from the FIFO and outputs pixels (1 bit, 2 bits, 4
bits, 8 bits, 16 bits or 24 bits wide) depending on the format specified in the PIXELSIZE field of the LCDCON2 reg-
ister. It also adapts the memory-ordering format. Both big-endian and little-endian formats are supported. They are
configured in the MEMOR field of the LCDCON2 register.
The organization of the pixel data in the memory depends on the configuration and is shown in Table 45-5 and
Note:
For a color depth of 24 bits per pixel there are two different formats supported: packed and unpacked. The packed for-
Table 45-4.
Datapath Parameters
Configuration
initial_latency
cycles_per_data
DISTYPE
SCAN
IFWIDTH
TFT
9
1
STN Mono
Single
4
13
4
STN Mono
Single
8
17
8
STN Mono
Dual
8
17
8
STN Mono
Dual
16
25
16
STN Color
Single
4
11
2
STN Color
Single
8
12
3
STN Color
Dual
8
14
4
STN Color
Dual
16
15
6