参数资料
型号: IPT-C2H-NIOS
厂商: Altera
文件页数: 104/138页
文件大小: 0K
描述: C2H COMPILER FOR NIOS II
标准包装: 1
系列: Nios®II
类型: Nios II
功能: C 到硬件编译器
许可证: 初始许可证
Performance
Performance
The performance section of the C2H build report details information
about each loop in the accelerated function. For each loop shown, the
report contains the following information:
File name and source line number
Loop latency
Cycles per loop iteration (CPLI)
Scheduling information per assignment
Scheduling information per state
In the following discussion of information shown in the performance
section, refer to Example 4–2 .
Example 4–2. CRC32 (Ethernet CRC)
#pragma altera_accelerate connect_variable
crc_calculation/data to onchipRAM1
#pragma altera_accelerate connect_variable
crc_calculation/table to onchipRAM2
unsigned long crc_calculation
( unsigned char * _ _ restrict_ _ data,
unsigned long * _ _ restrict_ _ table,
unsigned long length)
{
unsigned long i, crc = 0xFFFFFFFF;
unsigned char lut_addr;
for (i = 0; i < length; i++)
{
lut_addr = (crc & 0xFF) ^ *data++;
crc = (crc >> 8) ^ table[lut_addr];
}
return (crc ^ 0xFFFFFFFF);
}
Source Line Number
The performance section of the build report shows a source line number
for each loop statement. The line number is determined by the beginning
of the loop, which is the source line containing the opening block
delimiter ( { ). If your coding style places the loop keyword ( do , while , or
for ) on a separate line from the delimiter, the report shows the line where
the delimiter appears.
4–10
Nios II C2H Compiler User Guide
9.1
Altera Corporation
November 2009
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