参数资料
型号: IPT-C2H-NIOS
厂商: Altera
文件页数: 42/138页
文件大小: 0K
描述: C2H COMPILER FOR NIOS II
标准包装: 1
系列: Nios®II
类型: Nios II
功能: C 到硬件编译器
许可证: 初始许可证
One-to-One C-to-Hardware Mapping
Table 3–1 lists the equivalent hardware structures resulting from this
function.
Table 3–1. Hardware Structure for Arithmetic and Logical Operators
Line
while (len > 0) {
result += *a++ * *b++;
len--;
C Element
while
>
+=
* (pointer)
++
* (multiply)
--
Hardware Structure
Finite state machine with
nominal control logic. Refer to
section “Iteration Statements” on
page 3–5 .
32-bit comparator
64-bit adder
Avalon-MM master port to read
data (two total for *a++ and
*b++ ). Refer to section
“Indirection Operator (Pointer
Dereference)” on page 3–16 .
32-bit up-counter (two total for
*a++ and *b++ )
32x32=64-bit multiplier
32-bit down-counter
Assignments
A C assignment operator stores the value of an expression to a variable.
As a general rule, every assignment operator in the C code, such as = ,
translates to a registered signal in hardware. The value of an assignment's
expression is calculated in one clock cycle. Figure 3–1 shows the
hardware that results from the following statement:
int sum = x + y;
Figure 3–1. Hardware Resulting from Assignment
3–2
Nios II C2H Compiler User Guide
9.1
Altera Corporation
November 2009
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