参数资料
| 型号： | ISL6277IRZ |
| 厂商： | Intersil |
| 文件页数： | 15/37页 |
| 文件大小： | 0K |
| 描述： | IC PWM REG MULTIPH AMD 48-QFN |
| 标准包装： | 50 |
| 应用： | 控制器，AMD Fusion? SVI 2.0 CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.006 V ~ 1.55 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 管件 |
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ISL6277
V CRM
MASTER
CLOCK
CLOCK1
PWM1
CLOCK2
PWM2
VW
COMP
current will never reach 0A, and the regulator is in CCM, although
the controller is in DE mode.
Figure 11 shows the operation principle in diode emulation mode
at light load. The load gets incrementally lighter in the three cases
from top to bottom. The PWM on-time is determined by the VW
window size and therefore is the same, making the inductor
current triangle the same in the three cases. The ISL6277 clamps
the ripple capacitor voltage V CRS in DE mode to make it mimic the
inductor current. It takes the COMP voltage longer to hit V CRS ,
naturally stretching the switching period. The inductor current
triangles move farther apart, such that the inductor current
average value is equal to the load current. The reduced switching
frequency helps increase light-load efficiency.
CCM/DCM
CLOCK3
PWM3
V CRS
VW
BOUNDARY
VW
IL
VW LIGHT DCM
VCRS1
VCRS3
VCRS2
FIGURE 9. R 3 ? MODULATOR OPERATION PRINCIPLES IN LOAD
INSERTION RESPONSE
V CRS
IL
Diode Emulation and Period Stretching
V CRS
VW
DEEP DCM
The ISL6277 can operate in diode emulation (DE) mode to
improve light-load efficiency. In DE mode, the low-side MOSFET
conducts when the current is flowing from source to drain and
does not allow reverse current, thus emulating a diode. As
Figure 10 shows, when LGATE is on, the low-side MOSFET carries
current, creating negative voltage on the phase node due to the
voltage drop across the on-resistance. The ISL6277 monitors the
current by monitoring the phase node voltage. It turns off LGATE
when the phase node voltage reaches zero to prevent the inductor
current from reversing the direction and creating unnecessary
power loss.
PHASE
UGATE
LGATE
IL
FIGURE 10. DIODE EMULATION
If the load current is light enough, as Figure 10 shows, the
inductor current reaches and stays at zero before the next phase
node pulse, and the regulator is in discontinuous conduction
mode (DCM). If the load current is heavy enough, the inductor
15
IL
FIGURE 11. PERIOD STRETCHING
Channel Configuration
Individual PWM channels of either VR can be disabled by
connecting the ISENx pin of the channel not required to +5V. For
example, placing the controller in a 2+1 configuration, as shown
in Figure 5, requires ISEN3 of the Core VR and ISEN2 of the
Northbridge VR to be tied to +5V. This disables Channel 3 of the
Core VR and Channel 2 of the Northbridge VR. ISEN1_NB must
be tied through a 10k ? resistor to GND to prevent this pin from
pulling high and disabling the channel. Connecting ISEN1 or
ISEN1_NB to +5V will disable the corresponding VR output. This
feature allows debug of individual VR outputs.
Power-On Reset
Before the controller has sufficient bias to guarantee proper
operation, the ISL6277 requires a +5V input supply tied to VDD
and VDDP to exceed the VDD rising power-on reset (POR)
threshold. Once this threshold is reached or exceeded, the
ISL6277 has enough bias to check the state of the SVI inputs
once ENABLE is taken high. Hysteresis between the rising and
the falling thresholds assure the ISL6277 does not inadvertently
turn off unless the bias voltage drops substantially (see
“Electrical Specifications” on page 11). Note that VIN must be
present for the controller to drive the output voltage.
FN8270.1
March 8, 2012
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| ISL6277IRZ-T | 功能描述:IC PWM REG MULTIPH AMD 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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