参数资料
| 型号： | ISL6312IRZ |
| 厂商： | Intersil |
| 文件页数： | 21/35页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 4PHASE BUCK 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，Intel VR10、VR11、AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6312
User Selectable Adaptive Deadtime Control
Techniques
The ISL6312 integrated drivers incorporate two different
adaptive deadtime control techniques, which the user can
choose between. Both of these control techniques help to
minimize deadtime, resulting in high efficiency from the reduced
freewheeling time of the lower MOSFET body-diode
conduction, and both help to prevent the upper and lower
MOSFETs from conducting simultaneously. This is
accomplished by ensuring either rising gate turns on its
MOSFET with minimum and sufficient delay after the other has
turned off.
The difference between the two adaptive deadtime control
techniques is the method in which they detect that the lower
MOSFET has transitioned off in order to turn on the upper
MOSFET. The state of the DRSEL pin chooses which of the
two control techniques is active. By tying the DRSEL pin
directly to ground, the PHASE Detect Scheme is chosen,
which monitors the voltage on the PHASE pin to determine if
the lower MOSFET has transitioned off or not. Tying the
DRSEL pin to VCC though a 50k Ω resistor selects the
LGATE Detect Scheme, which monitors the voltage on the
LGATE pin to determine if the lower MOSFET has turned off
Once the PHASE is high, the advanced adaptive
shoot-through circuitry monitors the PHASE and UGATE
voltages during a PWM falling edge and the subsequent
UGATE turn-off. If either the UGATE falls to less than 1.75V
above the PHASE or the PHASE falls to less than +0.8V, the
LGATE is released to turn on.
Internal Bootstrap Device
All three integrated drivers feature an internal bootstrap
schottky diode. Simply adding an external capacitor across
the BOOT and PHASE pins completes the bootstrap circuit.
The bootstrap function is also designed to prevent the
bootstrap capacitor from overcharging due to the large
negative swing at the PHASE node. This reduces voltage
stress on the boot to phase pins.
1.6
1.4
1.2
1.0
0.8
or not. For both schemes, the method for determining
whether the upper MOSFET has transitioned off in order to
signal to turn on the lower MOSFET is the same.
PHASE DETECT
0.6
0.4
0.2
20nC
Q GATE = 100nC
50nC
If the DRSEL pin is tied directly to ground, the PHASE Detect
adaptive deadtime control technique is selected. For the
PHASE detect scheme, during turn-off of the lower MOSFET,
0.0
0.0
0.1
0.2
0.3
0.4 0.5 0.6
Δ V BOOT_CAP (V)
0.7
0.8
0.9
1.0
the PHASE voltage is monitored until it reaches a -0.3V/+0.8V
(forward/reverse inductor current). At this time the UGATE is
released to rise. An auto-zero comparator is used to correct the
r DS(ON) drop in the phase voltage preventing false detection of
the -0.3V phase level during r DS(ON) conduction period. In the
case of zero current, the UGATE is released after 35ns delay of
the LGATE dropping below 0.5V. When LGATE first begins to
transition low, this quick transition can disturb the PHASE node
and cause a false trip, so there is 20ns of blanking time once
LGATE falls until PHASE is monitored.
FIGURE 9. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
VOLTAGE
The bootstrap capacitor must have a maximum voltage
rating above PVCC + 4V and its capacitance value can be
chosen from Equation 16: where Q G1 is the amount of gate
charge per upper MOSFET at V GS1 gate-source voltage and
N Q1 is the number of control MOSFETs. The Δ V BOOT_CAP
term is defined as the allowable droop in the rail of the upper
gate drive.
C BOOT_CAP ≥ --------------------------------------
Once the PHASE is high, the advanced adaptive
shoot-through circuitry monitors the PHASE and UGATE
voltages during a PWM falling edge and the subsequent
Q GATE
Δ V BOOT_CAP
(EQ. 16)
Q GATE = ---------------------------------- ? N Q1
UGATE turn-off. If either the UGATE falls to less than 1.75V
above the PHASE or the PHASE falls to less than +0.8V, the
LGATE is released to turn-on.
LGATE DETECT
If the DRSEL pin is tied to VCC through a 50k Ω resistor, the
LGATE Detect adaptive deadtime control technique is selected.
For the LGATE detect scheme, during turn-off of the lower
MOSFET, the LGATE voltage is monitored until it reaches
1.75V. At this time the UGATE is released to rise.
21
Q G1 ? PVCC
V GS1
Gate Drive Voltage Versatility
The ISL6312 provides the user flexibility in choosing the
gate drive voltage for efficiency optimization. The controller
ties the upper and lower drive rails together. Simply applying
a voltage from 5V up to 12V on PVCC sets both gate drive
rail voltages simultaneously.
FN9289.6
February 1, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6312IRZ-T | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6313BCRZ | 功能描述:IC CTRLR PWM BUCK 2PHASE 36-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BCRZ-T | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BIRZ | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BIRZ-T | 功能描述:IC CTRLR PWM BUCK 2PHASE 36-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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