参数资料
| 型号： | ISL6312IRZ |
| 厂商： | Intersil |
| 文件页数： | 30/35页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 4PHASE BUCK 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，Intel VR10、VR11、AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6312
.
C 2
-------------------------------- > f 0
R C = R FB ? --------------------------------------------------------
2 ? π ? V PP ? R FB ? f 0
-------------------------------- ≤ f 0 < -------------------------------------
Case 1:
Case 2:
1
2 ? π ? L ? C
2 ? π ? f 0 ? V pp ? L ? C
0.66 ? V IN
0.66 ? V IN
C C = ----------------------------------------------------
1 1
2 ? π ? L ? C 2 ? π ? C ? ESR
C 1
R 1
R C
R FB
C C
COMP
FB
IDROOP
VDIFF
ISL6312
V PP ? ( 2 ? π ) 2 ? f 02 ? L ? C
0.66 ? V IN
C C = -------------------------------------------------------------------------------------
PP ? R FB ?
( 2 ? π ) 2 ? f 2 ? V L ? C
0.66 ? V
R C = R FB ? -----------------------------------------------------------------
IN
0
(EQ. 41)
FIGURE 21. COMPENSATION CIRCUIT WITHOUT LOAD-LINE
REGULATION
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
f 0 > -------------------------------------
Case 3:
1
2 ? π ? C ? ESR
Equation 42, R FB is selected arbitrarily. The remaining
compensation components are then selected according to
R C = R FB ? ---------------------------------------------
2 ? π ? V PP ? R FB ? f 0 ? L
R 1 = R FB ? --------------------------------------------
C 1 = --------------------------------------------
0.75 ? V IN
C 2 = -------------------------------------------------------------------------------------------------------------
HF ? ( L ? C ) ? R FB ? V ( P – P )
( 2 ? π ) 2 ? f ? f
V PP ? ? 2 π ? ? f 0 ? f HF ? L ? C ? R FB
R C = -----------------------------------------------------------------------------------------
0.75 ? V ? ( 2 ? π ? f HF ? L ? C – 1 )
2 ? π ? f 0 ? V pp ? L
0.66 ? V IN ? ESR
0.66 ? V IN ? ESR ? C
C C = ----------------------------------------------------------------
The optional capacitor C 2 , is sometimes needed to bypass
noise away from the PWM comparator (see Figure 20). Keep
a position available for C 2 , and be prepared to install a
high-frequency capacitor of between 22pF and 150pF in
case any leading edge jitter problem is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f 0 , of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
Equation 42.
In Equation 42, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V PP is the peak-to-
peak sawtooth signal amplitude as described in “Electrical
C ? ESR
L ? C – C ? ESR
L ? C – C ? ESR
R FB
0
2
? ?
IN
0.75 ? V IN ? ( 2 ? π ? f HF ? L ? C – 1 )
( 2 ? π ) 2 ? f 0 ? f HF ? ( L ? C ) ? R FB ? V ( P – P )
an extra high-frequency pole, f HF . This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
C C = -------------------------------------------------------------------------------------------------------------
(EQ. 42)
good general rule is to choose f HF = 10f 0 , but it can be
higher if desired. Choosing f HF to be lower than 10f 0 can
cause problems with too much phase shift below the system
bandwidth.
30
Output Filter Design
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter limits the system
transient response. The output capacitors must supply or
sink load current while the current in the output inductors
increases or decreases to meet the demand.
FN9289.6
February 1, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6312IRZ-T | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6313BCRZ | 功能描述:IC CTRLR PWM BUCK 2PHASE 36-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BCRZ-T | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BIRZ | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313BIRZ-T | 功能描述:IC CTRLR PWM BUCK 2PHASE 36-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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