参数资料
型号: ISL6313IRZ-T
厂商: Intersil
文件页数: 13/33页
文件大小: 0K
描述: IC CTRLR PWM 2PHASE BUCK 36-QFN
产品培训模块: Solutions for Industrial Control Applications
标准包装: 4,000
应用: 控制器,Intel VR11,AMD CPU
输入电压: 5 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-WFQFN 裸露焊盘
供应商设备封装: 36-TQFN 裸露焊盘(6x6)
包装: 带卷 (TR)
ISL6313
V IN
I
L
by the value of the effective sense resistance, R ISEN , and
the DCR of the inductor.
I SEN = I L ? ------------------
R
MOSFET
UGATE
L
DCR
V OUT
DCR
ISEN
(EQ. 6)
DRIVER
LGATE
INDUCTOR
V L (s)
C OUT
The effective internal R ISEN resistance is important to the
V C (s)
current sensing process because it sets the gain of the load
line regulation loop as well as the gain of the channel-current
R 1
C 1
balance loop and the overcurrent trip level. The effective
I n
ISL6313 INTERNAL
internal R ISEN resistance is user programmable and is set
SENSE
CIRCUIT
through use of the RSET pin. Placing a single resistor, R SET ,
from the RSET pin to the VCC pin programs the effective
internal R ISEN resistance according to Equation 7. It is
+
-
V C (s)
ISEN-
important to note that the R SET resistance value must be
between 20k Ω and 80k Ω for Equation 7 to be valid.
R ISEN = ---------- ? R SET
I SEN
R ISEN
ISEN+
RSET
3
400
*Note: R SET must be between 20k Ω and 80k Ω
(EQ. 7)
VCC
R SET
FIGURE 6. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 6. The channel current
I L , flowing through the inductor, passes through the DCR.
Equation 4 shows the s-domain equivalent voltage, V L ,
across the inductor.
Output Voltage Setting
The ISL6313 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3 or 4. In the Intel
VR11 mode of operation, each VID pin is pulled up to an
internal 1.2V voltage by a weak current source (40μA),
which decreases to 0A as the voltage at the VID pin varies
from 0 to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a week 20μA
V L ( s ) = I L ? ( s ? L + DCR )
(EQ. 4)
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
? ------------- + 1 ?
s ? L
? DCR
?
( s ? R 1 ? C 1 + 1 )
The ISL6313 accommodates three different DAC ranges:
A simple R-C network across the inductor (R 1 and C)
extracts the DCR voltage, as shown in Figure 6. The voltage
across the sense capacitor, V C , can be shown to be
proportional to the channel current I L , shown in Equation 5.
(EQ. 5)
V C ( s ) = ----------------------------------------- ? DCR ? I L
.
Intel VR11, AMD K8/K9 5-bit, and AMD 6-bit. The state of
the SS and VID7 pins decide which DAC version is active.
Refer to Table 1 for a description of how to select the desired
DAC version.
TABLE 1. ISL6313 DAC SELECT TABLE
If the R 1 -C 1 network components are selected such that
their time constant matches the inductor L/DCR time
constant, then V C is equal to the voltage drop across the
DCR.
DAC VERSION
INTEL VR11
AMD 5-bit
SS PIN
R SS resistor tied to
GND
R SS resistor tied to
VID7 PIN
-
high
VCC
The capacitor voltage V C , is then replicated across the
effective internal sense resistance R ISEN . This develops a
current through R ISEN which is proportional to the inductor
AMD 6-bit
R SS resistor tied to
VCC
low
current. This current, I SEN , is continuously sensed and is
then used by the controller for load-line regulation,
TABLE 2. VR11 VOLTAGE IDENTIFICATION CODES
channel-current balancing, and overcurrent detection and
limiting. Equation 6 shows that the proportion between the
channel-current, I L , and the sensed current, I SEN , is driven
VID7
0
0
0
0
VID6
0
0
0
0
VID5
0
0
0
0
VID4
0
0
0
0
VID3
0
0
0
0
VID2
0
0
0
0
VID1
0
0
1
1
VID0
0
1
0
1
VDAC
OFF
OFF
1.60000
1.59375
13
FN6448.2
September 2, 2008
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